From: Stephen Hurd <stephen.hurd@broadcom.com>
To: dev@dpdk.org, ajit.khaparde@broadcom.com, bruce.richardson@intel.com
Subject: [dpdk-dev] [PATCH v5 09/38] bnxt: add L2 filter alloc/init/free
Date: Tue, 14 Jun 2016 15:55:42 -0700 [thread overview]
Message-ID: <1465944971-113413-9-git-send-email-stephen.hurd@broadcom.com> (raw)
In-Reply-To: <1465944971-113413-1-git-send-email-stephen.hurd@broadcom.com>
From: Ajit Khaparde <ajit.khaparde@broadcom.com>
Add the L2 filter structure and the alloc/init/free functions for
dealing with them.
A filter is used to identify traffic that contains a matching set of
parameters like unicast or broadcast MAC address or a VLAN tag amongst
other things which then allows the ASIC to direct the incoming traffic
to an appropriate VNIC or Rx ring.
New HWRM calls:
bnxt_hwrm_clear_filter:
Free a L2 filter.
bnxt_hwrm_set_filter
Allocate an An L2 filter or a L2 context.
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Signed-off-by: Stephen Hurd <stephen.hurd@broadcom.com>
Reviewed-by: David Christensen <david.christensen@broadcom.com>
--
v4:
Address review comments and fix issues pointed out by checkpatch.
v5:
Move bnxt_hwrm_set_filter() into this patch
Add short descriptions of new HWRM calls
Reorder footer
---
drivers/net/bnxt/Makefile | 1 +
drivers/net/bnxt/bnxt.h | 3 +
drivers/net/bnxt/bnxt_filter.c | 175 +++++++++++++
drivers/net/bnxt/bnxt_filter.h | 74 ++++++
drivers/net/bnxt/bnxt_hwrm.c | 65 +++++
drivers/net/bnxt/bnxt_hwrm.h | 6 +
drivers/net/bnxt/hsi_struct_def_dpdk.h | 456 +++++++++++++++++++++++++++++++++
7 files changed, 780 insertions(+)
create mode 100644 drivers/net/bnxt/bnxt_filter.c
create mode 100644 drivers/net/bnxt/bnxt_filter.h
diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile
index afd1690..b7834b1 100644
--- a/drivers/net/bnxt/Makefile
+++ b/drivers/net/bnxt/Makefile
@@ -50,6 +50,7 @@ EXPORT_MAP := rte_pmd_bnxt_version.map
#
SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_cpr.c
SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_ethdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_filter.c
SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_hwrm.c
SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_ring.c
SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_vnic.c
diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index bdd355f..49aa38b 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -145,6 +145,9 @@ struct bnxt {
struct bnxt_vnic_info *vnic_info;
STAILQ_HEAD(, bnxt_vnic_info) free_vnic_list;
+ struct bnxt_filter_info *filter_info;
+ STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
+
/* VNIC pointer for flow filter (VMDq) pools */
#define MAX_FF_POOLS ETH_64_POOLS
STAILQ_HEAD(, bnxt_vnic_info) ff_pool[MAX_FF_POOLS];
diff --git a/drivers/net/bnxt/bnxt_filter.c b/drivers/net/bnxt/bnxt_filter.c
new file mode 100644
index 0000000..f03a1dc
--- /dev/null
+++ b/drivers/net/bnxt/bnxt_filter.c
@@ -0,0 +1,175 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) Broadcom Limited.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Broadcom Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/queue.h>
+
+#include <rte_log.h>
+#include <rte_malloc.h>
+
+#include "bnxt.h"
+#include "bnxt_filter.h"
+#include "bnxt_hwrm.h"
+#include "bnxt_vnic.h"
+#include "hsi_struct_def_dpdk.h"
+
+/*
+ * Filter Functions
+ */
+
+struct bnxt_filter_info *bnxt_alloc_filter(struct bnxt *bp)
+{
+ struct bnxt_filter_info *filter;
+
+ /* Find the 1st unused filter from the free_filter_list pool*/
+ filter = STAILQ_FIRST(&bp->free_filter_list);
+ if (!filter) {
+ RTE_LOG(ERR, PMD, "No more free filter resources\n");
+ return NULL;
+ }
+ STAILQ_REMOVE_HEAD(&bp->free_filter_list, next);
+
+ /* Default to L2 MAC Addr filter */
+ filter->flags = HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
+ filter->enables = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
+ HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
+ memcpy(filter->l2_addr, bp->eth_dev->data->mac_addrs->addr_bytes,
+ ETHER_ADDR_LEN);
+ memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
+ return filter;
+}
+
+void bnxt_init_filters(struct bnxt *bp)
+{
+ struct bnxt_filter_info *filter;
+ int i, max_filters;
+
+ if (BNXT_PF(bp)) {
+ struct bnxt_pf_info *pf = &bp->pf;
+
+ max_filters = pf->max_l2_ctx;
+ } else {
+ struct bnxt_vf_info *vf = &bp->vf;
+
+ max_filters = vf->max_l2_ctx;
+ }
+ STAILQ_INIT(&bp->free_filter_list);
+ for (i = 0; i < max_filters; i++) {
+ filter = &bp->filter_info[i];
+ filter->fw_l2_filter_id = -1;
+ STAILQ_INSERT_TAIL(&bp->free_filter_list, filter, next);
+ }
+}
+
+void bnxt_free_all_filters(struct bnxt *bp)
+{
+ struct bnxt_vnic_info *vnic;
+ struct bnxt_filter_info *filter, *temp_filter;
+ int i;
+
+ for (i = 0; i < MAX_FF_POOLS; i++) {
+ STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
+ filter = STAILQ_FIRST(&vnic->filter);
+ while (filter) {
+ temp_filter = STAILQ_NEXT(filter, next);
+ STAILQ_REMOVE(&vnic->filter, filter,
+ bnxt_filter_info, next);
+ STAILQ_INSERT_TAIL(&bp->free_filter_list,
+ filter, next);
+ filter = temp_filter;
+ }
+ STAILQ_INIT(&vnic->filter);
+ }
+ }
+}
+
+void bnxt_free_filter_mem(struct bnxt *bp)
+{
+ struct bnxt_filter_info *filter;
+ uint16_t max_filters, i;
+ int rc = 0;
+
+ /* Ensure that all filters are freed */
+ if (BNXT_PF(bp)) {
+ struct bnxt_pf_info *pf = &bp->pf;
+
+ max_filters = pf->max_l2_ctx;
+ } else {
+ struct bnxt_vf_info *vf = &bp->vf;
+
+ max_filters = vf->max_l2_ctx;
+ }
+ for (i = 0; i < max_filters; i++) {
+ filter = &bp->filter_info[i];
+ if (filter->fw_l2_filter_id != ((uint64_t)-1)) {
+ RTE_LOG(ERR, PMD, "HWRM filter is not freed??\n");
+ /* Call HWRM to try to free filter again */
+ rc = bnxt_hwrm_clear_filter(bp, filter);
+ if (rc)
+ RTE_LOG(ERR, PMD,
+ "HWRM filter cannot be freed rc = %d\n",
+ rc);
+ }
+ filter->fw_l2_filter_id = -1;
+ }
+ STAILQ_INIT(&bp->free_filter_list);
+
+ rte_free(bp->filter_info);
+ bp->filter_info = NULL;
+}
+
+int bnxt_alloc_filter_mem(struct bnxt *bp)
+{
+ struct bnxt_filter_info *filter_mem;
+ uint16_t max_filters;
+
+ if (BNXT_PF(bp)) {
+ struct bnxt_pf_info *pf = &bp->pf;
+
+ max_filters = pf->max_l2_ctx;
+ } else {
+ struct bnxt_vf_info *vf = &bp->vf;
+
+ max_filters = vf->max_l2_ctx;
+ }
+ /* Allocate memory for VNIC pool and filter pool */
+ filter_mem = rte_zmalloc("bnxt_filter_info",
+ max_filters * sizeof(struct bnxt_filter_info),
+ 0);
+ if (filter_mem == NULL) {
+ RTE_LOG(ERR, PMD, "Failed to alloc memory for %d filters",
+ max_filters);
+ return -ENOMEM;
+ }
+ bp->filter_info = filter_mem;
+ return 0;
+}
diff --git a/drivers/net/bnxt/bnxt_filter.h b/drivers/net/bnxt/bnxt_filter.h
new file mode 100644
index 0000000..06fe134
--- /dev/null
+++ b/drivers/net/bnxt/bnxt_filter.h
@@ -0,0 +1,74 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) Broadcom Limited.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Broadcom Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _BNXT_FILTER_H_
+#define _BNXT_FILTER_H_
+
+#include <rte_ether.h>
+
+struct bnxt;
+struct bnxt_filter_info {
+ STAILQ_ENTRY(bnxt_filter_info) next;
+ uint64_t fw_l2_filter_id;
+#define INVALID_MAC_INDEX ((uint16_t)-1)
+ uint16_t mac_index;
+
+ /* Filter Characteristics */
+ uint32_t flags;
+ uint32_t enables;
+ uint8_t l2_addr[ETHER_ADDR_LEN];
+ uint8_t l2_addr_mask[ETHER_ADDR_LEN];
+ uint16_t l2_ovlan;
+ uint16_t l2_ovlan_mask;
+ uint16_t l2_ivlan;
+ uint16_t l2_ivlan_mask;
+ uint8_t t_l2_addr[ETHER_ADDR_LEN];
+ uint8_t t_l2_addr_mask[ETHER_ADDR_LEN];
+ uint16_t t_l2_ovlan;
+ uint16_t t_l2_ovlan_mask;
+ uint16_t t_l2_ivlan;
+ uint16_t t_l2_ivlan_mask;
+ uint8_t tunnel_type;
+ uint16_t mirror_vnic_id;
+ uint32_t vni;
+ uint8_t pri_hint;
+ uint64_t l2_filter_id_hint;
+};
+
+struct bnxt_filter_info *bnxt_alloc_filter(struct bnxt *bp);
+void bnxt_init_filters(struct bnxt *bp);
+void bnxt_free_all_filters(struct bnxt *bp);
+void bnxt_free_filter_mem(struct bnxt *bp);
+int bnxt_alloc_filter_mem(struct bnxt *bp);
+
+#endif
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index f591ead..65cd4a7 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -39,7 +39,9 @@
#include <rte_version.h>
#include "bnxt.h"
+#include "bnxt_filter.h"
#include "bnxt_hwrm.h"
+#include "bnxt_vnic.h"
#include "hsi_struct_def_dpdk.h"
#define HWRM_CMD_TIMEOUT 2000
@@ -135,6 +137,69 @@ static int bnxt_hwrm_send_message(struct bnxt *bp, void *msg, uint32_t msg_len)
} \
}
+int bnxt_hwrm_clear_filter(struct bnxt *bp,
+ struct bnxt_filter_info *filter)
+{
+ int rc = 0;
+ struct hwrm_cfa_l2_filter_free_input req = {.req_type = 0 };
+ struct hwrm_cfa_l2_filter_free_output *resp = bp->hwrm_cmd_resp_addr;
+
+ HWRM_PREP(req, CFA_L2_FILTER_FREE, -1, resp);
+
+ req.l2_filter_id = rte_cpu_to_le_64(filter->fw_l2_filter_id);
+
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
+
+ HWRM_CHECK_RESULT;
+
+ filter->fw_l2_filter_id = -1;
+
+ return 0;
+}
+
+int bnxt_hwrm_set_filter(struct bnxt *bp,
+ struct bnxt_vnic_info *vnic,
+ struct bnxt_filter_info *filter)
+{
+ int rc = 0;
+ struct hwrm_cfa_l2_filter_alloc_input req = {.req_type = 0 };
+ struct hwrm_cfa_l2_filter_alloc_output *resp = bp->hwrm_cmd_resp_addr;
+ uint32_t enables = 0;
+
+ HWRM_PREP(req, CFA_L2_FILTER_ALLOC, -1, resp);
+
+ req.flags = rte_cpu_to_le_32(filter->flags);
+
+ enables = filter->enables |
+ HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID;
+ req.dst_id = rte_cpu_to_le_16(vnic->fw_vnic_id);
+
+ if (enables &
+ HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR)
+ memcpy(req.l2_addr, filter->l2_addr,
+ ETHER_ADDR_LEN);
+ if (enables &
+ HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK)
+ memcpy(req.l2_addr_mask, filter->l2_addr_mask,
+ ETHER_ADDR_LEN);
+ if (enables &
+ HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN)
+ req.l2_ovlan = filter->l2_ovlan;
+ if (enables &
+ HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK)
+ req.l2_ovlan_mask = filter->l2_ovlan_mask;
+
+ req.enables = rte_cpu_to_le_32(enables);
+
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
+
+ HWRM_CHECK_RESULT;
+
+ filter->fw_l2_filter_id = rte_le_to_cpu_64(resp->l2_filter_id);
+
+ return rc;
+}
+
int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, void *fwd_cmd)
{
int rc;
diff --git a/drivers/net/bnxt/bnxt_hwrm.h b/drivers/net/bnxt/bnxt_hwrm.h
index b792313..bc6fb08 100644
--- a/drivers/net/bnxt/bnxt_hwrm.h
+++ b/drivers/net/bnxt/bnxt_hwrm.h
@@ -41,6 +41,12 @@
#define HWRM_SEQ_ID_INVALID -1U
+int bnxt_hwrm_clear_filter(struct bnxt *bp,
+ struct bnxt_filter_info *filter);
+int bnxt_hwrm_set_filter(struct bnxt *bp,
+ struct bnxt_vnic_info *vnic,
+ struct bnxt_filter_info *filter);
+
int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, void *fwd_cmd);
int bnxt_hwrm_func_driver_register(struct bnxt *bp, uint32_t flags,
diff --git a/drivers/net/bnxt/hsi_struct_def_dpdk.h b/drivers/net/bnxt/hsi_struct_def_dpdk.h
index 9efb68b..ca42a87 100644
--- a/drivers/net/bnxt/hsi_struct_def_dpdk.h
+++ b/drivers/net/bnxt/hsi_struct_def_dpdk.h
@@ -253,6 +253,462 @@ struct output {
uint16_t resp_len;
} __attribute__((packed));
+/* hwrm_cfa_l2_filter_alloc */
+/*
+ * A filter is used to identify traffic that contains a matching set of
+ * parameters like unicast or broadcast MAC address or a VLAN tag amongst
+ * other things which then allows the ASIC to direct the incoming traffic
+ * to an appropriate VNIC or Rx ring.
+ */
+
+/* Input (96 bytes) */
+struct hwrm_cfa_l2_filter_alloc_input {
+ /*
+ * This value indicates what type of request this is. The format for the
+ * rest of the command is determined by this field.
+ */
+ uint16_t req_type;
+
+ /*
+ * This value indicates the what completion ring the request will be
+ * optionally completed on. If the value is -1, then no CR completion
+ * will be generated. Any other value must be a valid CR ring_id value
+ * for this function.
+ */
+ uint16_t cmpl_ring;
+
+ /* This value indicates the command sequence number. */
+ uint16_t seq_id;
+
+ /*
+ * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
+ * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
+ */
+ uint16_t target_id;
+
+ /*
+ * This is the host address where the response will be written when the
+ * request is complete. This area must be 16B aligned and must be
+ * cleared to zero before the request is made.
+ */
+ uint64_t resp_addr;
+
+ /*
+ * Enumeration denoting the RX, TX type of the resource. This
+ * enumeration is used for resources that are similar for both TX and RX
+ * paths of the chip.
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
+ UINT32_C(0x1)
+ /* tx path */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
+ (UINT32_C(0x0) << 0)
+ /* rx path */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
+ (UINT32_C(0x1) << 0)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
+ HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
+ /*
+ * Setting of this flag indicates the applicability to the loopback
+ * path.
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
+ UINT32_C(0x2)
+ /*
+ * Setting of this flag indicates drop action. If this flag is not set,
+ * then it should be considered accept action.
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
+ UINT32_C(0x4)
+ /*
+ * If this flag is set, all t_l2_* fields are invalid and they should
+ * not be specified. If this flag is set, then l2_* fields refer to
+ * fields of outermost L2 header.
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
+ UINT32_C(0x8)
+ uint32_t flags;
+
+ /* This bit must be '1' for the l2_addr field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
+ UINT32_C(0x1)
+ /* This bit must be '1' for the l2_addr_mask field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
+ UINT32_C(0x2)
+ /* This bit must be '1' for the l2_ovlan field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
+ UINT32_C(0x4)
+ /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
+ UINT32_C(0x8)
+ /* This bit must be '1' for the l2_ivlan field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
+ UINT32_C(0x10)
+ /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
+ UINT32_C(0x20)
+ /* This bit must be '1' for the t_l2_addr field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
+ UINT32_C(0x40)
+ /*
+ * This bit must be '1' for the t_l2_addr_mask field to be configured.
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
+ UINT32_C(0x80)
+ /* This bit must be '1' for the t_l2_ovlan field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
+ UINT32_C(0x100)
+ /*
+ * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
+ UINT32_C(0x200)
+ /* This bit must be '1' for the t_l2_ivlan field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
+ UINT32_C(0x400)
+ /*
+ * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
+ UINT32_C(0x800)
+ /* This bit must be '1' for the src_type field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
+ UINT32_C(0x1000)
+ /* This bit must be '1' for the src_id field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
+ UINT32_C(0x2000)
+ /* This bit must be '1' for the tunnel_type field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
+ UINT32_C(0x4000)
+ /* This bit must be '1' for the dst_id field to be configured. */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
+ UINT32_C(0x8000)
+ /*
+ * This bit must be '1' for the mirror_vnic_id field to be configured.
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
+ UINT32_C(0x10000)
+ uint32_t enables;
+
+ /*
+ * This value sets the match value for the L2 MAC address. Destination
+ * MAC address for RX path. Source MAC address for TX path.
+ */
+ uint8_t l2_addr[6];
+
+ uint8_t unused_0;
+ uint8_t unused_1;
+
+ /*
+ * This value sets the mask value for the L2 address. A value of 0 will
+ * mask the corresponding bit from compare.
+ */
+ uint8_t l2_addr_mask[6];
+
+ /* This value sets VLAN ID value for outer VLAN. */
+ uint16_t l2_ovlan;
+
+ /*
+ * This value sets the mask value for the ovlan id. A value of 0 will
+ * mask the corresponding bit from compare.
+ */
+ uint16_t l2_ovlan_mask;
+
+ /* This value sets VLAN ID value for inner VLAN. */
+ uint16_t l2_ivlan;
+
+ /*
+ * This value sets the mask value for the ivlan id. A value of 0 will
+ * mask the corresponding bit from compare.
+ */
+ uint16_t l2_ivlan_mask;
+
+ uint8_t unused_2;
+ uint8_t unused_3;
+
+ /*
+ * This value sets the match value for the tunnel L2 MAC address.
+ * Destination MAC address for RX path. Source MAC address for TX path.
+ */
+ uint8_t t_l2_addr[6];
+
+ uint8_t unused_4;
+ uint8_t unused_5;
+
+ /*
+ * This value sets the mask value for the tunnel L2 address. A value of
+ * 0 will mask the corresponding bit from compare.
+ */
+ uint8_t t_l2_addr_mask[6];
+
+ /* This value sets VLAN ID value for tunnel outer VLAN. */
+ uint16_t t_l2_ovlan;
+
+ /*
+ * This value sets the mask value for the tunnel ovlan id. A value of 0
+ * will mask the corresponding bit from compare.
+ */
+ uint16_t t_l2_ovlan_mask;
+
+ /* This value sets VLAN ID value for tunnel inner VLAN. */
+ uint16_t t_l2_ivlan;
+
+ /*
+ * This value sets the mask value for the tunnel ivlan id. A value of 0
+ * will mask the corresponding bit from compare.
+ */
+ uint16_t t_l2_ivlan_mask;
+
+ /* This value identifies the type of source of the packet. */
+ /* Network port */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
+ (UINT32_C(0x0) << 0)
+ /* Physical function */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
+ (UINT32_C(0x1) << 0)
+ /* Virtual function */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
+ (UINT32_C(0x2) << 0)
+ /* Virtual NIC of a function */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
+ (UINT32_C(0x3) << 0)
+ /* Embedded processor for CFA management */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
+ (UINT32_C(0x4) << 0)
+ /* Embedded processor for OOB management */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
+ (UINT32_C(0x5) << 0)
+ /* Embedded processor for RoCE */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
+ (UINT32_C(0x6) << 0)
+ /* Embedded processor for network proxy functions */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
+ (UINT32_C(0x7) << 0)
+ uint8_t src_type;
+
+ uint8_t unused_6;
+ /*
+ * This value is the id of the source. For a network port, it represents
+ * port_id. For a physical function, it represents fid. For a virtual
+ * function, it represents vf_id. For a vnic, it represents vnic_id. For
+ * embedded processors, this id is not valid. Notes: 1. The function ID
+ * is implied if it src_id is not provided for a src_type that is either
+ */
+ uint32_t src_id;
+
+ /* Tunnel Type. */
+ /* Non-tunnel */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
+ (UINT32_C(0x0) << 0)
+ /* Virtual eXtensible Local Area Network (VXLAN) */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
+ (UINT32_C(0x1) << 0)
+ /*
+ * Network Virtualization Generic Routing Encapsulation (NVGRE)
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
+ (UINT32_C(0x2) << 0)
+ /*
+ * Generic Routing Encapsulation (GRE) inside Ethernet payload
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
+ (UINT32_C(0x3) << 0)
+ /* IP in IP */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
+ (UINT32_C(0x4) << 0)
+ /* Generic Network Virtualization Encapsulation (Geneve) */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
+ (UINT32_C(0x5) << 0)
+ /* Multi-Protocol Lable Switching (MPLS) */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
+ (UINT32_C(0x6) << 0)
+ /* Stateless Transport Tunnel (STT) */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
+ (UINT32_C(0x7) << 0)
+ /*
+ * Generic Routing Encapsulation (GRE) inside IP datagram
+ * payload
+ */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
+ (UINT32_C(0x8) << 0)
+ /* Any tunneled traffic */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
+ (UINT32_C(0xff) << 0)
+ uint8_t tunnel_type;
+
+ uint8_t unused_7;
+
+ /*
+ * If set, this value shall represent the Logical VNIC ID of the
+ * destination VNIC for the RX path and network port id of the
+ * destination port for the TX path.
+ */
+ uint16_t dst_id;
+
+ /* Logical VNIC ID of the VNIC where traffic is mirrored. */
+ uint16_t mirror_vnic_id;
+
+ /*
+ * This hint is provided to help in placing the filter in the filter
+ * table.
+ */
+ /* No preference */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
+ (UINT32_C(0x0) << 0)
+ /* Above the given filter */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
+ (UINT32_C(0x1) << 0)
+ /* Below the given filter */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
+ (UINT32_C(0x2) << 0)
+ /* As high as possible */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
+ (UINT32_C(0x3) << 0)
+ /* As low as possible */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
+ (UINT32_C(0x4) << 0)
+ uint8_t pri_hint;
+
+ uint8_t unused_8;
+ uint32_t unused_9;
+
+ /*
+ * This is the ID of the filter that goes along with the pri_hint. This
+ * field is valid only for the following values. 1 - Above the given
+ * filter 2 - Below the given filter
+ */
+ uint64_t l2_filter_id_hint;
+} __attribute__((packed));
+
+/* Output (24 bytes) */
+struct hwrm_cfa_l2_filter_alloc_output {
+ /*
+ * Pass/Fail or error type Note: receiver to verify the in parameters,
+ * and fail the call with an error when appropriate
+ */
+ uint16_t error_code;
+
+ /* This field returns the type of original request. */
+ uint16_t req_type;
+
+ /* This field provides original sequence number of the command. */
+ uint16_t seq_id;
+
+ /*
+ * This field is the length of the response in bytes. The last byte of
+ * the response is a valid flag that will read as '1' when the command
+ * has been completely written to memory.
+ */
+ uint16_t resp_len;
+
+ /*
+ * This value identifies a set of CFA data structures used for an L2
+ * context.
+ */
+ uint64_t l2_filter_id;
+
+ /*
+ * This is the ID of the flow associated with this filter. This value
+ * shall be used to match and associate the flow identifier returned in
+ * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
+ */
+ uint32_t flow_id;
+
+ uint8_t unused_0;
+ uint8_t unused_1;
+ uint8_t unused_2;
+
+ /*
+ * This field is used in Output records to indicate that the output is
+ * completely written to RAM. This field should be read as '1' to
+ * indicate that the output has been completely written. When writing a
+ * command completion or response to an internal processor, the order of
+ * writes has to be such that this field is written last.
+ */
+ uint8_t valid;
+} __attribute__((packed));
+
+/* hwrm_cfa_l2_filter_free */
+/*
+ * Description: Free a L2 filter. The HWRM shall free all associated filter
+ * resources with the L2 filter.
+ */
+
+/* Input (24 bytes) */
+struct hwrm_cfa_l2_filter_free_input {
+ /*
+ * This value indicates what type of request this is. The format for the
+ * rest of the command is determined by this field.
+ */
+ uint16_t req_type;
+
+ /*
+ * This value indicates the what completion ring the request will be
+ * optionally completed on. If the value is -1, then no CR completion
+ * will be generated. Any other value must be a valid CR ring_id value
+ * for this function.
+ */
+ uint16_t cmpl_ring;
+
+ /* This value indicates the command sequence number. */
+ uint16_t seq_id;
+
+ /*
+ * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
+ * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
+ */
+ uint16_t target_id;
+
+ /*
+ * This is the host address where the response will be written when the
+ * request is complete. This area must be 16B aligned and must be
+ * cleared to zero before the request is made.
+ */
+ uint64_t resp_addr;
+
+ /*
+ * This value identifies a set of CFA data structures used for an L2
+ * context.
+ */
+ uint64_t l2_filter_id;
+} __attribute__((packed));
+
+/* Output (16 bytes) */
+struct hwrm_cfa_l2_filter_free_output {
+ /*
+ * Pass/Fail or error type Note: receiver to verify the in parameters,
+ * and fail the call with an error when appropriate
+ */
+ uint16_t error_code;
+
+ /* This field returns the type of original request. */
+ uint16_t req_type;
+
+ /* This field provides original sequence number of the command. */
+ uint16_t seq_id;
+
+ /*
+ * This field is the length of the response in bytes. The last byte of
+ * the response is a valid flag that will read as '1' when the command
+ * has been completely written to memory.
+ */
+ uint16_t resp_len;
+
+ uint32_t unused_0;
+ uint8_t unused_1;
+ uint8_t unused_2;
+ uint8_t unused_3;
+
+ /*
+ * This field is used in Output records to indicate that the output is
+ * completely written to RAM. This field should be read as '1' to
+ * indicate that the output has been completely written. When writing a
+ * command completion or response to an internal processor, the order of
+ * writes has to be such that this field is written last.
+ */
+ uint8_t valid;
+} __attribute__((packed));
+
/* hwrm_exec_fwd_resp */
/*
* Description: This command is used to send an encapsulated request to the
--
1.9.1
next prev parent reply other threads:[~2016-06-14 22:57 UTC|newest]
Thread overview: 132+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-06 22:08 [dpdk-dev] [PATCH v4 01/39] bnxt: new driver for Broadcom NetXtreme-C devices Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 02/39] bnxt: add HWRM init code Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 03/39] bnxt: add driver register/unregister support Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 04/39] bnxt: add dev infos get operation Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 05/39] bnxt: add dev configure operation Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 06/39] bnxt: add vnic functions and structs Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 07/39] bnxt: declare ring structs and free() func Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 08/39] bnxt: add completion ring support Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 09/39] bnxt: add L2 filter alloc/init/free Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 10/39] bnxt: add Tx queue operations (nonfunctional) Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 11/39] bnxt: add Rx queue create/destroy operations Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 12/39] bnxt: Add statistics operations Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 13/39] bnxt: initial Tx code implementation Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 14/39] bnxt: initial Rx " Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 15/39] bnxt: Code to alloc/free ring Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 16/39] bnxt: add HWRM function reset command Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 17/39] bnxt: add HWRM vnic alloc function Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 18/39] bnxt: add HWRM vnic free function Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 19/39] bnxt: add HWRM vnic configure function Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 20/39] bnxt: add API to allow configuration of vnic Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 21/39] bnxt: add HWRM API to configure RSS Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 22/39] bnxt: add API for L2 Rx mask set/clear functions Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 23/39] bnxt: add HWRM stats context allocation Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 24/39] bnxt: add HWRM ring alloc/free functions Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 25/39] bnxt: add ring group " Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 26/39] bnxt: add HWRM stat context free function Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 27/39] bnxt: Add HWRM API to set and clear filters Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 28/39] bnxt: add ring alloc, free and group init Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 29/39] bnxt: add HWRM port PHY config call and helpers Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 30/39] bnxt: add start/stop/link update operations Stephen Hurd
2016-06-08 10:02 ` Bruce Richardson
2016-06-08 10:41 ` Bruce Richardson
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 31/39] bnxt: add promiscuous enable/disable operations Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 32/39] bnxt: add all multicast " Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 33/39] bnxt: free memory in close operation Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 34/39] bnxt: add MAC address add/remove dev_ops Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 35/39] bnxt: add set link up/down operations Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 36/39] bnxt: add reta update/query operations Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 37/39] bnxt: add RSS device operations Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 38/39] bnxt: add flow control operations Stephen Hurd
2016-06-06 22:08 ` [dpdk-dev] [PATCH v4 39/39] bnxt: Replace bnxt_ring_struct with bnxt_ring Stephen Hurd
2016-06-07 6:25 ` [dpdk-dev] [PATCH v4 01/39] bnxt: new driver for Broadcom NetXtreme-C devices Thomas Monjalon
2016-06-08 10:31 ` Bruce Richardson
2016-06-08 10:21 ` Bruce Richardson
2016-06-08 10:41 ` Bruce Richardson
2016-06-14 13:14 ` Bruce Richardson
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 01/38] " Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 02/38] bnxt: add HWRM init code Stephen Hurd
2016-06-15 16:25 ` Ferruh Yigit
2016-06-15 20:28 ` Stephen Hurd
2016-06-16 9:46 ` Bruce Richardson
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 03/38] bnxt: add driver register/unregister support Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 04/38] bnxt: add dev infos get operation Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 05/38] bnxt: add dev configure operation Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 06/38] bnxt: add vnic functions and structs Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 07/38] bnxt: declare generic ring structs and free() func Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 08/38] bnxt: add completion ring support Stephen Hurd
2016-06-14 22:55 ` Stephen Hurd [this message]
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 10/38] bnxt: add Tx queue operations (nonfunctional) Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 11/38] bnxt: add Rx queue create/destroy operations Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 12/38] bnxt: add statistics operations Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 13/38] bnxt: add initial Tx code implementation Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 14/38] bnxt: add initial Rx " Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 15/38] bnxt: add code to alloc/free Tx Rx and cmpl rings Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 16/38] bnxt: add HWRM function reset command Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 17/38] bnxt: add HWRM vnic alloc function Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 18/38] bnxt: add HWRM vnic free function Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 19/38] bnxt: add HWRM vnic configure function Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 20/38] bnxt: add API to allow configuration of vnic Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 21/38] bnxt: add HWRM API to configure RSS Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 22/38] bnxt: add API for L2 Rx mask set/clear functions Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 23/38] bnxt: add HWRM API for stats context allocation Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 24/38] bnxt: add HWRM ring alloc/free functions Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 25/38] bnxt: add ring group " Stephen Hurd
2016-06-14 22:55 ` [dpdk-dev] [PATCH v5 26/38] bnxt: add HWRM stat context free function Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 27/38] bnxt: add HWRM API to set and clear filters Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 28/38] bnxt: allocate and free all HWRM rings and groups Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 29/38] bnxt: add HWRM port PHY config call and helpers Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 30/38] bnxt: add start/stop/link update operations Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 31/38] bnxt: add promiscuous enable/disable operations Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 32/38] bnxt: add all multicast " Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 33/38] bnxt: free memory in close operation Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 34/38] bnxt: add MAC address add/remove dev ops Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 35/38] bnxt: add set link up/down operations Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 36/38] bnxt: add reta update/query operations Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 37/38] bnxt: add RSS device operations Stephen Hurd
2016-06-14 22:56 ` [dpdk-dev] [PATCH v5 38/38] bnxt: add flow control operations Stephen Hurd
2016-06-15 15:28 ` [dpdk-dev] [PATCH v5 01/38] bnxt: new driver for Broadcom NetXtreme-C devices Bruce Richardson
2016-06-15 15:30 ` Bruce Richardson
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 00/38] new bnxt poll mode driver library Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 01/38] bnxt: new driver for Broadcom NetXtreme-C devices Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 02/38] bnxt: add HWRM init code Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 03/38] bnxt: add driver register/unregister support Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 04/38] bnxt: add dev infos get operation Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 05/38] bnxt: add dev configure operation Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 06/38] bnxt: add vnic functions and structs Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 07/38] bnxt: declare generic ring structs and free() func Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 08/38] bnxt: add completion ring support Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 09/38] bnxt: add L2 filter alloc/init/free Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 10/38] bnxt: add Tx queue operations (nonfunctional) Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 11/38] bnxt: add Rx queue create/destroy operations Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 12/38] bnxt: add statistics operations Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 13/38] bnxt: add initial Tx code implementation Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 14/38] bnxt: add initial Rx " Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 15/38] bnxt: add code to alloc/free Tx Rx and cmpl rings Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 16/38] bnxt: add HWRM function reset command Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 17/38] bnxt: add HWRM vnic alloc function Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 18/38] bnxt: add HWRM vnic free function Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 19/38] bnxt: add HWRM vnic configure function Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 20/38] bnxt: add API to allow configuration of vnic Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 21/38] bnxt: add HWRM API to configure RSS Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 22/38] bnxt: add API for L2 Rx mask set/clear functions Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 23/38] bnxt: add HWRM API for stats context allocation Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 24/38] bnxt: add HWRM ring alloc/free functions Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 25/38] bnxt: add ring group " Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 26/38] bnxt: add HWRM stat context free function Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 27/38] bnxt: add HWRM API to set and clear filters Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 28/38] bnxt: allocate and free all HWRM rings and groups Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 29/38] bnxt: add HWRM port PHY config call and helpers Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 30/38] bnxt: add start/stop/link update operations Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 31/38] bnxt: add promiscuous enable/disable operations Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 32/38] bnxt: add all multicast " Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 33/38] bnxt: free memory in close operation Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 34/38] bnxt: add MAC address add/remove dev ops Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 35/38] bnxt: add set link up/down operations Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 36/38] bnxt: add reta update/query operations Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 37/38] bnxt: add RSS device operations Stephen Hurd
2016-06-15 21:23 ` [dpdk-dev] [PATCH v6 38/38] bnxt: add flow control operations Stephen Hurd
2016-06-16 14:24 ` [dpdk-dev] [PATCH v6 00/38] new bnxt poll mode driver library Bruce Richardson
2016-06-16 18:51 ` Ajit Khaparde
2016-06-21 14:25 ` Ajit Khaparde
2016-06-21 14:46 ` Bruce Richardson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1465944971-113413-9-git-send-email-stephen.hurd@broadcom.com \
--to=stephen.hurd@broadcom.com \
--cc=ajit.khaparde@broadcom.com \
--cc=bruce.richardson@intel.com \
--cc=dev@dpdk.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).