From: "Sekhar, Ashwin" <Ashwin.Sekhar@cavium.com>
To: "Sekhar, Ashwin" <Ashwin.Sekhar@cavium.com>,
"jianbo.liu@linaro.org" <jianbo.liu@linaro.org>
Cc: "Jacob, Jerin" <Jerin.JacobKollanukkaran@cavium.com>,
"thomas@monjalon.net" <thomas@monjalon.net>,
"jasvinder.singh@intel.com" <jasvinder.singh@intel.com>,
"cristian.dumitrescu@intel.com" <cristian.dumitrescu@intel.com>,
"viktorin@rehivetech.com" <viktorin@rehivetech.com>,
"dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH v4 3/4] net: add arm64 neon version of CRC compute APIs
Date: Fri, 12 May 2017 08:56:39 +0000 [thread overview]
Message-ID: <1494579399.13572.15.camel@caviumnetworks.com> (raw)
In-Reply-To: <CAP4Qi39-tztg9THf7b32THPKx-aMZJaLCXCJRPOw67=ZiKRx6w@mail.gmail.com>
On Fri, 2017-05-12 at 16:49 +0800, Jianbo Liu wrote:
> On 12 May 2017 at 15:25, Sekhar, Ashwin <Ashwin.Sekhar@cavium.com>
> wrote:
> >
> > On Fri, 2017-05-12 at 13:51 +0800, Jianbo Liu wrote:
> > >
> > > On 9 May 2017 at 17:53, Ashwin Sekhar T K
> > > <ashwin.sekhar@caviumnetworks.com> wrote:
> > > >
> > > >
> > > > Added CRC compute APIs for arm64 utilizing the pmull
> > > > capability
> > > >
> > > > Added new file net_crc_neon.h to hold the arm64 pmull
> > > > CRC implementation
> > > >
> > > > Verified the changes with crc_autotest unit test case
> > > >
> > > > Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.
> > > > com>
> > > > ---
> > > > v2:
> > > > * Fixed merge conflict in MAINTAINERS
> > > >
> > > > v3:
> > > > * Moved feature detection changes and GCC_VERSION definition
> > > > changes to separate commit
> > > > * Replaced usage of assert() with RTE_ASSERT()
> > > > * Made the comments in rte_vect.h more positive in sense
> > > >
> > > > v4:
> > > > * Rebased on top of latest commit
> > > >
> > > > MAINTAINERS | 1 +
> > > > lib/librte_eal/common/include/arch/arm/rte_vect.h | 28 ++
> > > > lib/librte_net/net_crc_neon.h | 357
> > > > ++++++++++++++++++++++
> > > > lib/librte_net/rte_net_crc.c | 34 ++-
> > > > lib/librte_net/rte_net_crc.h | 2 +
> > > > 5 files changed, 416 insertions(+), 6 deletions(-)
> > > > create mode 100644 lib/librte_net/net_crc_neon.h
> > > >
> > > >
> > ...
> > >
> > > >
> > > > +
> > > > +struct crc_pmull_ctx crc32_eth_pmull __rte_aligned(16);
> > > > +struct crc_pmull_ctx crc16_ccitt_pmull __rte_aligned(16);
> > > > +
> > > > +static inline uint8x16_t
> > > > +extract_vector(uint8x16_t v0, uint8x16_t v1, const int n)
> > > > +{
> > > > + switch (n) {
> > > > + case 0: return vextq_u8(v0, v1, 0);
> > > > + case 1: return vextq_u8(v0, v1, 1);
> > > > + case 2: return vextq_u8(v0, v1, 2);
> > > > + case 3: return vextq_u8(v0, v1, 3);
> > > > + case 4: return vextq_u8(v0, v1, 4);
> > > > + case 5: return vextq_u8(v0, v1, 5);
> > > > + case 6: return vextq_u8(v0, v1, 6);
> > > > + case 7: return vextq_u8(v0, v1, 7);
> > > > + case 8: return vextq_u8(v0, v1, 8);
> > > > + case 9: return vextq_u8(v0, v1, 9);
> > > > + case 10: return vextq_u8(v0, v1, 10);
> > > > + case 11: return vextq_u8(v0, v1, 11);
> > > > + case 12: return vextq_u8(v0, v1, 12);
> > > > + case 13: return vextq_u8(v0, v1, 13);
> > > > + case 14: return vextq_u8(v0, v1, 14);
> > > > + case 15: return vextq_u8(v0, v1, 15);
> > > > + }
> > > > + return v1;
> > > > +}
> > > > +
> > > > +/**
> > > > + * Shifts right 128 bit register by specified number of bytes
> > > > + *
> > > > + * @param reg 128 bit value
> > > > + * @param num number of bytes to shift reg by (0-16)
> > > > + *
> > > > + * @return reg << (num * 8)
> > > > + */
> > > > +static inline uint64x2_t
> > > > +shift_bytes_right(uint64x2_t reg, const unsigned int num)
> > > > +{
> > > > + /* Right Shift */
> > > > + return vreinterpretq_u64_u8(extract_vector(
> > > > + vreinterpretq_u8_u64(reg),
> > > > + vdupq_n_u8(0),
> > > > + num));
> > > > +}
> > > > +
> > > > +/**
> > > > + * Shifts left 128 bit register by specified number of bytes
> > > > + *
> > > > + * @param reg 128 bit value
> > > > + * @param num number of bytes to shift reg by (0-16)
> > > > + *
> > > > + * @return reg << (num * 8)
> > > > + */
> > > > +static inline uint64x2_t
> > > > +shift_bytes_left(uint64x2_t reg, const unsigned int num)
> > > > +{
> > > > + /* Left Shift */
> > > > + return vreinterpretq_u64_u8(extract_vector(
> > > > + vdupq_n_u8(0),
> > > > + vreinterpretq_u8_u64(reg),
> > > > + 16 - num));
> > > > +}
> > > > +
> > > Can you move shift_bytes_right/shift_bytes_left to rte_vect.h
> > > because
> > > they are common functions?
> > These are not really common functions. I dont think it will have a
> > wider usage as its shifting by bytes and not by bits.
> >
> I think these shifting may be used by other functions.
> For example, to replace _mm_srli_si128.
>
> >
> > In x86 case also, xmm_shift_left is not made a common function.
> >
> But its counterpart right shifting (_mm_srli_si128) is...
>
> >
> > Moreover, I have not tested the behaviour of these functions when
> > the
> > shift amt is (< 0) or (> 16) as these cases will never arise in the
> > CRC
> > code.
> >
> You can define thee functions according to current requirement.
> And I don't think this parameter can be <0 or > 16.
Okay. In that case, I will move it to rte_vect.h.
Ashwin
next prev parent reply other threads:[~2017-05-12 8:56 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-27 14:06 [dpdk-dev] [PATCH 1/2] " Ashwin Sekhar T K
2017-05-04 6:56 ` [dpdk-dev] [PATCH v3 1/4] mk: add crypto capability for generic armv8a and thunderx Ashwin Sekhar T K
2017-05-04 6:57 ` [dpdk-dev] [PATCH v3 2/4] eal: move gcc version definition to common header Ashwin Sekhar T K
2017-05-04 15:22 ` Jan Viktorin
2017-05-04 6:57 ` [dpdk-dev] [PATCH v3 3/4] net: add arm64 neon version of CRC compute APIs Ashwin Sekhar T K
2017-05-04 6:57 ` [dpdk-dev] [PATCH v3 4/4] test: add tests for arm64 CRC neon versions Ashwin Sekhar T K
2017-05-04 15:20 ` [dpdk-dev] [PATCH v3 1/4] mk: add crypto capability for generic armv8a and thunderx Jan Viktorin
2017-05-04 22:10 ` Thomas Monjalon
2017-05-09 9:53 ` [dpdk-dev] [PATCH v4 " Ashwin Sekhar T K
2017-05-09 9:53 ` [dpdk-dev] [PATCH v4 2/4] eal: move gcc version definition to common header Ashwin Sekhar T K
2017-05-09 9:53 ` [dpdk-dev] [PATCH v4 3/4] net: add arm64 neon version of CRC compute APIs Ashwin Sekhar T K
2017-05-12 5:51 ` Jianbo Liu
2017-05-12 7:25 ` Sekhar, Ashwin
2017-05-12 8:49 ` Jianbo Liu
2017-05-12 8:56 ` Sekhar, Ashwin [this message]
2017-05-09 9:53 ` [dpdk-dev] [PATCH v4 4/4] test: add tests for arm64 CRC neon versions Ashwin Sekhar T K
2017-05-12 10:15 ` [dpdk-dev] [PATCH v5 0/4] add arm64 neon version of CRC compute APIs Ashwin Sekhar T K
2017-05-12 10:15 ` [dpdk-dev] [PATCH v5 1/4] mk: add crypto capability for generic armv8a and thunderx Ashwin Sekhar T K
2017-05-12 10:15 ` [dpdk-dev] [PATCH v5 2/4] eal: move gcc version definition to common header Ashwin Sekhar T K
2017-05-15 2:07 ` Jianbo Liu
2017-07-03 20:51 ` Thomas Monjalon
2017-07-04 8:48 ` Sekhar, Ashwin
2017-05-12 10:15 ` [dpdk-dev] [PATCH v5 3/4] net: add arm64 neon version of CRC compute APIs Ashwin Sekhar T K
2017-05-15 2:32 ` Jianbo Liu
2017-07-03 21:06 ` Thomas Monjalon
2017-05-12 10:15 ` [dpdk-dev] [PATCH v5 4/4] test: add tests for arm64 CRC neon versions Ashwin Sekhar T K
2017-07-04 9:24 ` [dpdk-dev] [PATCH v6 0/4] add arm64 neon version of CRC compute APIs Ashwin Sekhar T K
2017-07-04 9:24 ` [dpdk-dev] [PATCH v6 1/4] mk: add crypto capability for generic armv8a and thunderx Ashwin Sekhar T K
2017-07-04 9:24 ` [dpdk-dev] [PATCH v6 2/4] eal: move gcc version definition to common header Ashwin Sekhar T K
2017-07-04 9:24 ` [dpdk-dev] [PATCH v6 3/4] net: add arm64 neon version of CRC compute APIs Ashwin Sekhar T K
2017-07-04 13:53 ` Thomas Monjalon
2017-07-04 9:24 ` [dpdk-dev] [PATCH v6 4/4] test: add tests for arm64 CRC neon versions Ashwin Sekhar T K
2017-07-04 13:55 ` [dpdk-dev] [PATCH v6 0/4] add arm64 neon version of CRC compute APIs Thomas Monjalon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1494579399.13572.15.camel@caviumnetworks.com \
--to=ashwin.sekhar@cavium.com \
--cc=Jerin.JacobKollanukkaran@cavium.com \
--cc=cristian.dumitrescu@intel.com \
--cc=dev@dpdk.org \
--cc=jasvinder.singh@intel.com \
--cc=jianbo.liu@linaro.org \
--cc=thomas@monjalon.net \
--cc=viktorin@rehivetech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).