From: Lee Daly <lee.daly@intel.com>
To: akhil.goyal@nxp.com
Cc: dev@dpdk.org, Lee Daly <lee.daly@intel.com>
Subject: [dpdk-dev] [PATCH 1/3] compress/isal: enable checksum support in driver
Date: Tue, 9 Oct 2018 17:21:47 +0100 [thread overview]
Message-ID: <1539102109-9311-1-git-send-email-lee.daly@intel.com> (raw)
This patch adds checksum support in the ISA-L PMD for both compression
and decompression.
CRC32 is supported as well as Adler32.
Signed-off-by: Lee Daly <lee.daly@intel.com>
---
drivers/compress/isal/isal_compress_pmd.c | 82 +++++++++++++++++++++++----
drivers/compress/isal/isal_compress_pmd_ops.c | 4 +-
2 files changed, 73 insertions(+), 13 deletions(-)
diff --git a/drivers/compress/isal/isal_compress_pmd.c b/drivers/compress/isal/isal_compress_pmd.c
index e943336..e377417 100644
--- a/drivers/compress/isal/isal_compress_pmd.c
+++ b/drivers/compress/isal/isal_compress_pmd.c
@@ -16,8 +16,11 @@
#define RTE_COMP_ISAL_LEVEL_ONE 1
#define RTE_COMP_ISAL_LEVEL_TWO 2
#define RTE_COMP_ISAL_LEVEL_THREE 3 /* Optimised for AVX512 & AVX2 only */
+#define RTE_COMP_ISAL_CRC_SIZE 8
+#define RTE_COMP_ISAL_ADLER_SIZE 4
int isal_logtype_driver;
+uint8_t checksum_size;
/* Verify and set private xform parameters */
int
@@ -43,12 +46,6 @@ isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform,
}
priv_xform->compress.algo = RTE_COMP_ALGO_DEFLATE;
- /* Set private xform checksum - raw deflate by default */
- if (xform->compress.chksum != RTE_COMP_CHECKSUM_NONE) {
- ISAL_PMD_LOG(ERR, "Checksum not supported\n");
- return -ENOTSUP;
- }
-
/* Set private xform window size, 32K supported */
if (xform->compress.window_size == RTE_COMP_ISAL_WINDOW_SIZE)
priv_xform->compress.window_size =
@@ -77,6 +74,29 @@ isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform,
return -ENOTSUP;
}
+ /* Set private xform checksum */
+ switch (xform->compress.chksum) {
+ /* Raw deflate by default */
+ case(RTE_COMP_CHECKSUM_NONE):
+ priv_xform->compress.chksum = IGZIP_DEFLATE;
+ break;
+ case(RTE_COMP_CHECKSUM_CRC32):
+ priv_xform->compress.chksum = IGZIP_GZIP_NO_HDR;
+ checksum_size = RTE_COMP_ISAL_CRC_SIZE;
+ break;
+ case(RTE_COMP_CHECKSUM_ADLER32):
+ priv_xform->compress.chksum = IGZIP_ZLIB_NO_HDR;
+ checksum_size = RTE_COMP_ISAL_ADLER_SIZE;
+ break;
+ case(RTE_COMP_CHECKSUM_CRC32_ADLER32):
+ ISAL_PMD_LOG(ERR, "Combined CRC and ADLER checksum not"
+ " supported\n");
+ return -ENOTSUP;
+ default:
+ ISAL_PMD_LOG(ERR, "Checksum type not supported\n");
+ return -ENOTSUP;
+ }
+
/* Set private xform level.
* Checking compliance with compressdev API, -1 <= level => 9
*/
@@ -170,9 +190,26 @@ isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform,
}
priv_xform->decompress.algo = RTE_COMP_ALGO_DEFLATE;
- /* Set private xform checksum - raw deflate by default */
- if (xform->compress.chksum != RTE_COMP_CHECKSUM_NONE) {
- ISAL_PMD_LOG(ERR, "Checksum not supported\n");
+ /* Set private xform checksum */
+ switch (xform->decompress.chksum) {
+ /* Raw deflate by default */
+ case(RTE_COMP_CHECKSUM_NONE):
+ priv_xform->decompress.chksum = ISAL_DEFLATE;
+ break;
+ case(RTE_COMP_CHECKSUM_CRC32):
+ priv_xform->decompress.chksum = ISAL_GZIP_NO_HDR;
+ checksum_size = RTE_COMP_ISAL_CRC_SIZE;
+ break;
+ case(RTE_COMP_CHECKSUM_ADLER32):
+ priv_xform->decompress.chksum = ISAL_ZLIB_NO_HDR;
+ checksum_size = RTE_COMP_ISAL_ADLER_SIZE;
+ break;
+ case(RTE_COMP_CHECKSUM_CRC32_ADLER32):
+ ISAL_PMD_LOG(ERR, "Combined CRC and ADLER checksum not"
+ " supported\n");
+ return -ENOTSUP;
+ default:
+ ISAL_PMD_LOG(ERR, "Checksum type not supported\n");
return -ENOTSUP;
}
@@ -377,6 +414,9 @@ process_isal_deflate(struct rte_comp_op *op, struct isal_comp_qp *qp,
qp->stream->level_buf = temp_level_buf;
+ /* Set Checksum flag */
+ qp->stream->gzip_flag = priv_xform->compress.chksum;
+
/* Stateless operation, input will be consumed in one go */
qp->stream->flush = NO_FLUSH;
@@ -461,14 +501,25 @@ process_isal_deflate(struct rte_comp_op *op, struct isal_comp_qp *qp,
}
}
op->consumed = qp->stream->total_in;
- op->produced = qp->stream->total_out;
+ /* If checksum requested, total_out must be adjusted
+ * to reflect only compressed data.
+ */
+ op->produced = qp->stream->gzip_flag == IGZIP_DEFLATE ?
+ qp->stream->total_out :
+ qp->stream->total_out - checksum_size;
+
+ op->output_chksum = (qp->stream->gzip_flag == IGZIP_ZLIB_NO_HDR)
+ ? qp->stream->internal_state.crc + 1
+ : qp->stream->internal_state.crc;
+ isal_deflate_reset(qp->stream);
return ret;
}
/* Stateless Decompression Function */
static int
-process_isal_inflate(struct rte_comp_op *op, struct isal_comp_qp *qp)
+process_isal_inflate(struct rte_comp_op *op, struct isal_comp_qp *qp,
+ struct isal_priv_xform *priv_xform)
{
int ret = 0;
@@ -477,6 +528,9 @@ process_isal_inflate(struct rte_comp_op *op, struct isal_comp_qp *qp)
/* Initialize decompression state */
isal_inflate_init(qp->state);
+ /* Set Checksum flag */
+ qp->state->crc_flag = priv_xform->decompress.chksum;
+
if (op->m_src->pkt_len < (op->src.length + op->src.offset)) {
ISAL_PMD_LOG(ERR, "Input mbuf(s) not big enough.\n");
op->status = RTE_COMP_OP_STATUS_INVALID_ARGS;
@@ -538,6 +592,10 @@ process_isal_inflate(struct rte_comp_op *op, struct isal_comp_qp *qp)
op->consumed = op->src.length - qp->state->avail_in;
}
op->produced = qp->state->total_out;
+ op->output_chksum = qp->state->crc;
+
+ isal_inflate_reset(qp->state);
+
return ret;
}
@@ -552,7 +610,7 @@ process_op(struct isal_comp_qp *qp, struct rte_comp_op *op,
process_isal_deflate(op, qp, priv_xform);
break;
case RTE_COMP_DECOMPRESS:
- process_isal_inflate(op, qp);
+ process_isal_inflate(op, qp, priv_xform);
break;
default:
ISAL_PMD_LOG(ERR, "Operation Not Supported\n");
diff --git a/drivers/compress/isal/isal_compress_pmd_ops.c b/drivers/compress/isal/isal_compress_pmd_ops.c
index 41cade8..7b91849 100644
--- a/drivers/compress/isal/isal_compress_pmd_ops.c
+++ b/drivers/compress/isal/isal_compress_pmd_ops.c
@@ -17,7 +17,9 @@ static const struct rte_compressdev_capabilities isal_pmd_capabilities[] = {
RTE_COMP_FF_OOP_LB_IN_SGL_OUT |
RTE_COMP_FF_SHAREABLE_PRIV_XFORM |
RTE_COMP_FF_HUFFMAN_FIXED |
- RTE_COMP_FF_HUFFMAN_DYNAMIC,
+ RTE_COMP_FF_HUFFMAN_DYNAMIC |
+ RTE_COMP_FF_CRC32_CHECKSUM |
+ RTE_COMP_FF_ADLER32_CHECKSUM,
.window_size = {
.min = 15,
.max = 15,
--
2.7.4
next reply other threads:[~2018-10-09 16:21 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-09 16:21 Lee Daly [this message]
2018-10-09 16:21 ` [dpdk-dev] [PATCH 2/3] test/compress: add checksum tests Lee Daly
2018-10-11 10:37 ` Trahe, Fiona
2018-10-09 16:21 ` [dpdk-dev] [PATCH 3/3] doc: update ISA-L guide to reflect checksum support Lee Daly
2018-10-11 10:04 ` Trahe, Fiona
2018-11-28 10:41 ` [dpdk-dev] [PATCH v2 1/3] compress/isal: enable checksum support in driver Lee Daly
2018-11-28 10:41 ` [dpdk-dev] [PATCH v2 2/3] test/compress: add checksum tests Lee Daly
2018-12-05 13:57 ` Jozwiak, TomaszX
2018-12-12 0:25 ` Trahe, Fiona
2018-11-28 10:41 ` [dpdk-dev] [PATCH v2 3/3] doc: update ISA-L guide to reflect checksum support Lee Daly
2018-12-12 0:27 ` Trahe, Fiona
2018-12-12 0:10 ` [dpdk-dev] [PATCH v2 1/3] compress/isal: enable checksum support in driver Trahe, Fiona
2018-12-13 10:42 ` [dpdk-dev] [PATCH v3 " Lee Daly
2018-12-13 10:42 ` [dpdk-dev] [PATCH v3 2/3] test/compress: add checksum tests Lee Daly
2018-12-13 10:42 ` [dpdk-dev] [PATCH v3 3/3] doc: update ISA-L guide to reflect checksum support Lee Daly
2018-12-28 5:04 ` Varghese, Vipin
2019-01-07 10:37 ` Daly, Lee
2019-01-07 13:31 ` Varghese, Vipin
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