From: Anoob Joseph <anoobj@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>
Cc: Anoob Joseph <anoobj@marvell.com>,
Jerin Jacob <jerinj@marvell.com>,
"Ankur Dwivedi" <adwivedi@marvell.com>,
Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>,
Archana Muniganti <marchana@marvell.com>
Subject: [dpdk-dev] [PATCH v2 08/20] crypto/cnxk: add cipher operation in session
Date: Fri, 25 Jun 2021 11:26:19 +0530 [thread overview]
Message-ID: <1624600591-29841-9-git-send-email-anoobj@marvell.com> (raw)
In-Reply-To: <1624600591-29841-1-git-send-email-anoobj@marvell.com>
Add support for cipher operation in session.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 3 +
drivers/crypto/cnxk/cnxk_se.h | 106 +++++++++++++++++++++++++++++++
2 files changed, 109 insertions(+)
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 8ef0e6f..b6d3076 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -457,6 +457,9 @@ sym_session_configure(struct roc_cpt *roc_cpt, int driver_id,
sess_priv = priv;
switch (ret) {
+ case CNXK_CPT_CIPHER:
+ ret = fill_sess_cipher(xform, sess_priv);
+ break;
default:
ret = -1;
}
diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index 9cccab0..b5a16c4 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -28,4 +28,110 @@ struct cnxk_se_sess {
struct roc_se_ctx roc_se_ctx;
} __rte_cache_aligned;
+static __rte_always_inline int
+fill_sess_cipher(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess)
+{
+ struct rte_crypto_cipher_xform *c_form;
+ roc_se_cipher_type enc_type = 0; /* NULL Cipher type */
+ uint32_t cipher_key_len = 0;
+ uint8_t zsk_flag = 0, aes_ctr = 0, is_null = 0;
+
+ c_form = &xform->cipher;
+
+ if (c_form->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
+ sess->cpt_op |= ROC_SE_OP_CIPHER_ENCRYPT;
+ else if (c_form->op == RTE_CRYPTO_CIPHER_OP_DECRYPT) {
+ sess->cpt_op |= ROC_SE_OP_CIPHER_DECRYPT;
+ if (xform->next != NULL &&
+ xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
+ /* Perform decryption followed by auth verify */
+ sess->roc_se_ctx.template_w4.s.opcode_minor =
+ ROC_SE_FC_MINOR_OP_HMAC_FIRST;
+ }
+ } else {
+ plt_dp_err("Unknown cipher operation\n");
+ return -1;
+ }
+
+ switch (c_form->algo) {
+ case RTE_CRYPTO_CIPHER_AES_CBC:
+ enc_type = ROC_SE_AES_CBC;
+ cipher_key_len = 16;
+ break;
+ case RTE_CRYPTO_CIPHER_3DES_CBC:
+ enc_type = ROC_SE_DES3_CBC;
+ cipher_key_len = 24;
+ break;
+ case RTE_CRYPTO_CIPHER_DES_CBC:
+ /* DES is implemented using 3DES in hardware */
+ enc_type = ROC_SE_DES3_CBC;
+ cipher_key_len = 8;
+ break;
+ case RTE_CRYPTO_CIPHER_AES_CTR:
+ enc_type = ROC_SE_AES_CTR;
+ cipher_key_len = 16;
+ aes_ctr = 1;
+ break;
+ case RTE_CRYPTO_CIPHER_NULL:
+ enc_type = 0;
+ is_null = 1;
+ break;
+ case RTE_CRYPTO_CIPHER_KASUMI_F8:
+ enc_type = ROC_SE_KASUMI_F8_ECB;
+ cipher_key_len = 16;
+ zsk_flag = ROC_SE_K_F8;
+ break;
+ case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
+ enc_type = ROC_SE_SNOW3G_UEA2;
+ cipher_key_len = 16;
+ zsk_flag = ROC_SE_ZS_EA;
+ break;
+ case RTE_CRYPTO_CIPHER_ZUC_EEA3:
+ enc_type = ROC_SE_ZUC_EEA3;
+ cipher_key_len = 16;
+ zsk_flag = ROC_SE_ZS_EA;
+ break;
+ case RTE_CRYPTO_CIPHER_AES_XTS:
+ enc_type = ROC_SE_AES_XTS;
+ cipher_key_len = 16;
+ break;
+ case RTE_CRYPTO_CIPHER_3DES_ECB:
+ enc_type = ROC_SE_DES3_ECB;
+ cipher_key_len = 24;
+ break;
+ case RTE_CRYPTO_CIPHER_AES_ECB:
+ enc_type = ROC_SE_AES_ECB;
+ cipher_key_len = 16;
+ break;
+ case RTE_CRYPTO_CIPHER_3DES_CTR:
+ case RTE_CRYPTO_CIPHER_AES_F8:
+ case RTE_CRYPTO_CIPHER_ARC4:
+ plt_dp_err("Crypto: Unsupported cipher algo %u", c_form->algo);
+ return -1;
+ default:
+ plt_dp_err("Crypto: Undefined cipher algo %u specified",
+ c_form->algo);
+ return -1;
+ }
+
+ if (c_form->key.length < cipher_key_len) {
+ plt_dp_err("Invalid cipher params keylen %u",
+ c_form->key.length);
+ return -1;
+ }
+
+ sess->zsk_flag = zsk_flag;
+ sess->aes_gcm = 0;
+ sess->aes_ctr = aes_ctr;
+ sess->iv_offset = c_form->iv.offset;
+ sess->iv_length = c_form->iv.length;
+ sess->is_null = is_null;
+
+ if (unlikely(roc_se_ciph_key_set(&sess->roc_se_ctx, enc_type,
+ c_form->key.data, c_form->key.length,
+ NULL)))
+ return -1;
+
+ return 0;
+}
#endif /*_CNXK_SE_H_ */
--
2.7.4
next prev parent reply other threads:[~2021-06-25 5:58 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <http://patches.dpdk.org/project/dpdk/cover/1622652221-22732-1-git-send-email-anoobj@marvell.com/>
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 00/20] Add Marvell CNXK crypto PMDs Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 01/20] crypto/cnxk: add driver skeleton Anoob Joseph
2021-07-08 17:08 ` Ali Alnubani
2021-07-08 20:15 ` David Marchand
2021-07-09 15:22 ` David Marchand
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 02/20] crypto/cnxk: add probe and remove Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 03/20] crypto/cnxk: add device control ops Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 04/20] crypto/cnxk: add queue pair ops Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 05/20] crypto/cnxk: add session ops framework Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 06/20] crypto/cnxk: add enqueue burst op Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 07/20] crypto/cnxk: add dequeue " Anoob Joseph
2021-06-25 5:56 ` Anoob Joseph [this message]
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 09/20] crypto/cnxk: add auth operation in session Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 10/20] crypto/cnxk: add aead " Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 11/20] crypto/cnxk: add chained " Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 12/20] crypto/cnxk: add flexi crypto cipher encrypt Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 13/20] crypto/cnxk: add flexi crypto cipher decrypt Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 14/20] crypto/cnxk: add ZUC and SNOW3G encrypt Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 15/20] crypto/cnxk: add ZUC and SNOW3G decrypt Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 16/20] crypto/cnxk: add KASUMI encrypt Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 17/20] crypto/cnxk: add KASUMI decrypt Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 18/20] crypto/cnxk: add digest support Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 19/20] crypto/cnxk: add symmetric crypto capabilities Anoob Joseph
2021-06-25 5:56 ` [dpdk-dev] [PATCH v2 20/20] test/crypto: enable cnxk crypto PMDs Anoob Joseph
2021-06-28 19:19 ` [dpdk-dev] [PATCH v2 00/20] Add Marvell CNXK " Akhil Goyal
2021-06-28 20:31 ` Akhil Goyal
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