From: Bruce Richardson <bruce.richardson@intel.com>
To: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Cc: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>,
Satha Rao <skoteshwar@caviumnetworks.com>,
"Zhang, Helin" <helin.zhang@intel.com>,
"Wu, Jingjing" <jingjing.wu@intel.com>,
"jianbo.liu@linaro.org" <jianbo.liu@linaro.org>,
"dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH v2] i40e: Fix eth_i40e_dev_init sequence on ThunderX
Date: Tue, 22 Nov 2016 13:46:54 +0000 [thread overview]
Message-ID: <20161122134654.GA58712@bricha3-MOBL3.ger.corp.intel.com> (raw)
In-Reply-To: <20161121221638.GA17380@svelivela-lt.caveonetworks.com>
On Tue, Nov 22, 2016 at 03:46:38AM +0530, Jerin Jacob wrote:
> On Sun, Nov 20, 2016 at 11:21:43PM +0000, Ananyev, Konstantin wrote:
> > Hi
> > >
> > > i40e_asq_send_command: rd32 & wr32 under ThunderX gives unpredictable
> > > results. To solve this include rte memory barriers
> > >
> > > Signed-off-by: Satha Rao <skoteshwar@caviumnetworks.com>
> > > ---
> > > drivers/net/i40e/base/i40e_osdep.h | 14 ++++++++++++++
> > > 1 file changed, 14 insertions(+)
> > >
> > > diff --git a/drivers/net/i40e/base/i40e_osdep.h b/drivers/net/i40e/base/i40e_osdep.h
> > > index 38e7ba5..ffa3160 100644
> > > --- a/drivers/net/i40e/base/i40e_osdep.h
> > > +++ b/drivers/net/i40e/base/i40e_osdep.h
> > > @@ -158,7 +158,13 @@ do { \
> > > ((volatile uint32_t *)((char *)(a)->hw_addr + (reg)))
> > > static inline uint32_t i40e_read_addr(volatile void *addr)
> > > {
> > > +#if defined(RTE_ARCH_ARM64)
> > > + uint32_t val = rte_le_to_cpu_32(I40E_PCI_REG(addr));
> > > + rte_rmb();
> > > + return val;
> >
> > If you really need an rmb/wmb with MMIO read/writes on ARM,
> > I think you can avoid #ifdefs here and use rte_smp_rmb/rte_smp_wmb.
> > BTW, I suppose if you need it for i40e, you would need it for other devices too.
>
> Yes. ARM would need for all devices(typically, the devices on external PCI bus).
> I guess rte_smp_rmb may not be the correct abstraction. So we need more of
> rte_rmb() as we need only non smp variant on IO side. I guess then it make sense to
> create new abstraction in eal with following variants so that each arch
> gets opportunity to make what it makes sense that specific platform
>
> rte_readb_relaxed
> rte_readw_relaxed
> rte_readl_relaxed
> rte_readq_relaxed
> rte_writeb_relaxed
> rte_writew_relaxed
> rte_writel_relaxed
> rte_writeq_relaxed
> rte_readb
> rte_readw
> rte_readl
> rte_readq
> rte_writeb
> rte_writew
> rte_writel
> rte_writeq
>
> Thoughts ?
>
That seems like a lot of API calls!
Perhaps you can clarify - why would the rte_smp_rmb() not work for you?
/Bruce
next prev parent reply other threads:[~2016-11-22 13:46 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-18 12:52 Satha Rao
2016-11-18 15:00 ` Bruce Richardson
2016-11-20 23:21 ` Ananyev, Konstantin
2016-11-21 22:16 ` Jerin Jacob
2016-11-22 13:46 ` Bruce Richardson [this message]
2016-11-22 18:49 ` Jerin Jacob
2016-11-30 17:52 ` Ananyev, Konstantin
2016-11-30 20:54 ` Jerin Jacob
2016-12-01 11:38 ` Ananyev, Konstantin
2017-02-07 14:33 ` Ferruh Yigit
[not found] <mailman.4.1479684107.2722.dev@dpdk.org>
2016-11-30 1:23 ` Asok Tiyyagura
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