From: Adrien Mazarguil <adrien.mazarguil@6wind.com>
To: Matan Azrad <matan@mellanox.com>
Cc: dev@dpdk.org, Ophir Munk <ophirmu@mellanox.com>
Subject: Re: [dpdk-dev] [PATCH v4 7/8] net/mlx4: fix HW memory optimizations careless
Date: Thu, 2 Nov 2017 14:43:19 +0100 [thread overview]
Message-ID: <20171102134319.GF24849@6wind.com> (raw)
In-Reply-To: <1509474093-31388-8-git-send-email-matan@mellanox.com>
On Tue, Oct 31, 2017 at 06:21:32PM +0000, Matan Azrad wrote:
> Volatilize all Rx/Tx HW negotiation memories to be sure no compiler
> optimization prevents either load or store commands.
>
> Fixes: c3c977bbecbd ("net/mlx4: add Tx bypassing Verbs")
> Fixes: 9f57340a8087 ("net/mlx4: restore Rx offloads")
> Fixes: 6681b845034c ("net/mlx4: add Rx bypassing Verbs")
> Fixes: 62e96ffb93ad ("net/mlx4: fix no Rx interrupts")
>
> Signed-off-by: Matan Azrad <matan@mellanox.com>
Since this should fix all remaining concerns:
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
A few minor comments below.
> ---
> drivers/net/mlx4/mlx4_prm.h | 18 ++++++------
> drivers/net/mlx4/mlx4_rxtx.c | 67 ++++++++++++++++++++++++--------------------
> 2 files changed, 45 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/net/mlx4/mlx4_prm.h b/drivers/net/mlx4/mlx4_prm.h
> index b0fd982..6d10b4e 100644
> --- a/drivers/net/mlx4/mlx4_prm.h
> +++ b/drivers/net/mlx4/mlx4_prm.h
> @@ -80,14 +80,14 @@ enum {
>
> /* Send queue information. */
> struct mlx4_sq {
> - uint8_t *buf; /**< SQ buffer. */
> - uint8_t *eob; /**< End of SQ buffer */
> + volatile uint8_t *buf; /**< SQ buffer. */
> + volatile uint8_t *eob; /**< End of SQ buffer */
> uint32_t head; /**< SQ head counter in units of TXBBS. */
> uint32_t tail; /**< SQ tail counter in units of TXBBS. */
> uint32_t txbb_cnt; /**< Num of WQEBB in the Q (should be ^2). */
> uint32_t txbb_cnt_mask; /**< txbbs_cnt mask (txbb_cnt is ^2). */
> uint32_t headroom_txbbs; /**< Num of txbbs that should be kept free. */
> - uint32_t *db; /**< Pointer to the doorbell. */
> + volatile uint32_t *db; /**< Pointer to the doorbell. */
> uint32_t doorbell_qpn; /**< qp number to write to the doorbell. */
> };
>
> @@ -101,10 +101,10 @@ struct mlx4_sq {
> /* Completion queue information. */
> struct mlx4_cq {
> void *cq_uar; /**< CQ user access region. */
I'm curious why UAR isn't volatile as well?
> - void *cq_db_reg; /**< CQ doorbell register. */
> - uint32_t *set_ci_db; /**< Pointer to the completion queue doorbell. */
> - uint32_t *arm_db; /**< Pointer to doorbell for arming Rx events. */
> - uint8_t *buf; /**< Pointer to the completion queue buffer. */
> + volatile void *cq_db_reg; /**< CQ doorbell register. */
> + volatile uint32_t *set_ci_db; /**< Pointer to the CQ doorbell. */
> + volatile uint32_t *arm_db; /**< Arming Rx events doorbell. */
> + volatile uint8_t *buf; /**< Pointer to the completion queue buffer. */
> uint32_t cqe_cnt; /**< Number of entries in the queue. */
> uint32_t cqe_64:1; /**< CQ entry size is 64 bytes. */
> uint32_t cons_index; /**< Last queue entry that was handled. */
> @@ -128,10 +128,10 @@ struct mlx4_cq {
> * @return
> * Pointer to CQE entry.
> */
> -static inline struct mlx4_cqe *
> +static inline volatile struct mlx4_cqe *
> mlx4_get_cqe(struct mlx4_cq *cq, uint32_t index)
> {
> - return (struct mlx4_cqe *)(cq->buf +
> + return (volatile struct mlx4_cqe *)(cq->buf +
> ((index & (cq->cqe_cnt - 1)) <<
> (5 + cq->cqe_64)) +
> (cq->cqe_64 << 5));
> diff --git a/drivers/net/mlx4/mlx4_rxtx.c b/drivers/net/mlx4/mlx4_rxtx.c
> index 176000f..bd6d888 100644
> --- a/drivers/net/mlx4/mlx4_rxtx.c
> +++ b/drivers/net/mlx4/mlx4_rxtx.c
> @@ -70,7 +70,7 @@
> * DWORD (32 byte) of a TXBB.
> */
> struct pv {
> - struct mlx4_wqe_data_seg *dseg;
> + volatile struct mlx4_wqe_data_seg *dseg;
> uint32_t val;
> };
>
> @@ -98,14 +98,15 @@ struct pv {
> {
> uint32_t stamp = rte_cpu_to_be_32(MLX4_SQ_STAMP_VAL |
> (!!owner << MLX4_SQ_STAMP_SHIFT));
> - uint8_t *wqe = mlx4_get_send_wqe(sq, (index & sq->txbb_cnt_mask));
> - uint32_t *ptr = (uint32_t *)wqe;
> + volatile uint8_t *wqe = mlx4_get_send_wqe(sq,
> + (index & sq->txbb_cnt_mask));
> + volatile uint32_t *ptr = (volatile uint32_t *)wqe;
> int i;
> int txbbs_size;
> int num_txbbs;
>
> /* Extract the size from the control segment of the WQE. */
> - num_txbbs = MLX4_SIZE_TO_TXBBS((((struct mlx4_wqe_ctrl_seg *)
> + num_txbbs = MLX4_SIZE_TO_TXBBS((((volatile struct mlx4_wqe_ctrl_seg *)
> wqe)->fence_size & 0x3f) << 4);
> txbbs_size = num_txbbs * MLX4_TXBB_SIZE;
> /* Optimize the common case when there is no wrap-around. */
> @@ -120,8 +121,8 @@ struct pv {
> for (i = 0; i < txbbs_size; i += MLX4_SQ_STAMP_STRIDE) {
> *ptr = stamp;
> ptr += MLX4_SQ_STAMP_DWORDS;
> - if ((uint8_t *)ptr >= sq->eob) {
> - ptr = (uint32_t *)sq->buf;
> + if ((volatile uint8_t *)ptr >= sq->eob) {
> + ptr = (volatile uint32_t *)sq->buf;
> stamp ^= RTE_BE32(0x80000000);
> }
> }
> @@ -150,7 +151,7 @@ struct pv {
> unsigned int elts_comp = txq->elts_comp;
> unsigned int elts_tail = txq->elts_tail;
> struct mlx4_cq *cq = &txq->mcq;
> - struct mlx4_cqe *cqe;
> + volatile struct mlx4_cqe *cqe;
> uint32_t cons_index = cq->cons_index;
> uint16_t new_index;
> uint16_t nr_txbbs = 0;
> @@ -161,7 +162,7 @@ struct pv {
> * reported by them.
> */
> do {
> - cqe = (struct mlx4_cqe *)mlx4_get_cqe(cq, cons_index);
> + cqe = (volatile struct mlx4_cqe *)mlx4_get_cqe(cq, cons_index);
> if (unlikely(!!(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK) ^
> !!(cons_index & cq->cqe_cnt)))
> break;
> @@ -172,8 +173,8 @@ struct pv {
> #ifndef NDEBUG
> if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
> MLX4_CQE_OPCODE_ERROR)) {
> - struct mlx4_err_cqe *cqe_err =
> - (struct mlx4_err_cqe *)cqe;
> + volatile struct mlx4_err_cqe *cqe_err =
> + (volatile struct mlx4_err_cqe *)cqe;
> ERROR("%p CQE error - vendor syndrome: 0x%x"
> " syndrome: 0x%x\n",
> (void *)txq, cqe_err->vendor_err,
> @@ -240,15 +241,15 @@ struct pv {
>
> static int
> mlx4_tx_burst_segs(struct rte_mbuf *buf, struct txq *txq,
> - struct mlx4_wqe_ctrl_seg **pctrl)
> + volatile struct mlx4_wqe_ctrl_seg **pctrl)
Looks like an indentation issue here.
--
Adrien Mazarguil
6WIND
next prev parent reply other threads:[~2017-11-02 13:43 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1508752838-30408-1-git-send-email-ophirmu@mellanox.com>
2017-10-23 14:21 ` [dpdk-dev] [PATCH v2 0/7] net/mlx4: follow-up on new TX datapath introduced in RC1 Ophir Munk
2017-10-23 14:21 ` [dpdk-dev] [PATCH v2 1/7] net/mlx4: remove error flows from Tx fast path Ophir Munk
2017-10-25 16:49 ` Adrien Mazarguil
2017-10-23 14:21 ` [dpdk-dev] [PATCH v2 2/7] net/mlx4: inline more Tx functions Ophir Munk
2017-10-25 16:49 ` Adrien Mazarguil
2017-10-25 21:42 ` Ophir Munk
2017-10-26 7:48 ` Adrien Mazarguil
2017-10-26 14:27 ` Ophir Munk
2017-10-29 19:30 ` Ophir Munk
2017-10-23 14:21 ` [dpdk-dev] [PATCH v2 3/7] net/mlx4: save lkey in big-endian format Ophir Munk
2017-10-23 15:24 ` Nélio Laranjeiro
2017-10-23 14:21 ` [dpdk-dev] [PATCH v2 4/7] net/mlx4: merge Tx path functions Ophir Munk
2017-10-24 13:51 ` Nélio Laranjeiro
2017-10-24 20:36 ` Ophir Munk
2017-10-25 7:50 ` Nélio Laranjeiro
2017-10-26 10:31 ` Matan Azrad
2017-10-26 12:12 ` Nélio Laranjeiro
2017-10-26 12:30 ` Matan Azrad
2017-10-26 13:44 ` Nélio Laranjeiro
2017-10-26 16:21 ` Matan Azrad
2017-10-23 14:21 ` [dpdk-dev] [PATCH v2 5/7] net/mlx4: remove unnecessary variables in Tx burst Ophir Munk
2017-10-25 16:49 ` Adrien Mazarguil
2017-10-23 14:21 ` [dpdk-dev] [PATCH v2 6/7] net/mlx4: improve performance of one Tx segment Ophir Munk
2017-10-25 16:50 ` Adrien Mazarguil
2017-10-23 14:22 ` [dpdk-dev] [PATCH v2 7/7] net/mlx4: separate Tx for multi-segments Ophir Munk
2017-10-25 16:50 ` Adrien Mazarguil
2017-10-30 8:15 ` Ophir Munk
2017-10-30 10:07 ` [dpdk-dev] [PATCH v3 0/7] Tx path improvements Matan Azrad
2017-10-30 10:07 ` [dpdk-dev] [PATCH v3 1/7] net/mlx4: remove error flows from Tx fast path Matan Azrad
2017-10-30 14:23 ` Adrien Mazarguil
2017-10-30 18:11 ` Matan Azrad
2017-10-31 10:16 ` Adrien Mazarguil
2017-10-30 10:07 ` [dpdk-dev] [PATCH v3 2/7] net/mlx4: associate MR to MP in a short function Matan Azrad
2017-10-30 14:23 ` Adrien Mazarguil
2017-10-31 13:25 ` Ophir Munk
2017-10-30 10:07 ` [dpdk-dev] [PATCH v3 3/7] net/mlx4: merge Tx path functions Matan Azrad
2017-10-30 14:23 ` Adrien Mazarguil
2017-10-30 18:12 ` Matan Azrad
2017-10-30 10:07 ` [dpdk-dev] [PATCH v3 4/7] net/mlx4: remove completion counter in Tx burst Matan Azrad
2017-10-30 14:23 ` Adrien Mazarguil
2017-10-30 10:07 ` [dpdk-dev] [PATCH v3 5/7] net/mlx4: separate Tx segment cases Matan Azrad
2017-10-30 14:23 ` Adrien Mazarguil
2017-10-30 18:23 ` Matan Azrad
2017-10-31 10:17 ` Adrien Mazarguil
2017-10-30 10:07 ` [dpdk-dev] [PATCH v3 6/7] net/mlx4: mitigate Tx path memory barriers Matan Azrad
2017-10-30 14:23 ` Adrien Mazarguil
2017-10-30 19:47 ` Matan Azrad
2017-10-31 10:17 ` Adrien Mazarguil
2017-10-31 11:35 ` Matan Azrad
2017-10-31 13:21 ` Adrien Mazarguil
2017-10-30 10:07 ` [dpdk-dev] [PATCH v3 7/7] net/mlx4: remove empty Tx segment support Matan Azrad
2017-10-30 14:24 ` Adrien Mazarguil
2017-10-31 18:21 ` [dpdk-dev] [PATCH v4 0/8] net/mlx4: Tx path improvements Matan Azrad
2017-10-31 18:21 ` [dpdk-dev] [PATCH v4 1/8] net/mlx4: remove error flows from Tx fast path Matan Azrad
2017-10-31 18:21 ` [dpdk-dev] [PATCH v4 2/8] net/mlx4: associate MR to MP in a short function Matan Azrad
2017-11-02 13:42 ` Adrien Mazarguil
2017-10-31 18:21 ` [dpdk-dev] [PATCH v4 3/8] net/mlx4: fix ring wraparound compiler hint Matan Azrad
2017-11-02 13:42 ` Adrien Mazarguil
2017-10-31 18:21 ` [dpdk-dev] [PATCH v4 4/8] net/mlx4: merge Tx path functions Matan Azrad
2017-11-02 13:42 ` Adrien Mazarguil
2017-10-31 18:21 ` [dpdk-dev] [PATCH v4 5/8] net/mlx4: remove duplicate handling in Tx burst Matan Azrad
2017-11-02 13:42 ` Adrien Mazarguil
2017-10-31 18:21 ` [dpdk-dev] [PATCH v4 6/8] net/mlx4: separate Tx segment cases Matan Azrad
2017-11-02 13:43 ` Adrien Mazarguil
2017-10-31 18:21 ` [dpdk-dev] [PATCH v4 7/8] net/mlx4: fix HW memory optimizations careless Matan Azrad
2017-11-02 13:43 ` Adrien Mazarguil [this message]
2017-10-31 18:21 ` [dpdk-dev] [PATCH v4 8/8] net/mlx4: mitigate Tx path memory barriers Matan Azrad
2017-11-02 13:43 ` Adrien Mazarguil
2017-11-02 13:41 ` [dpdk-dev] [PATCH] net/mlx4: fix missing include Adrien Mazarguil
2017-11-02 20:35 ` Ferruh Yigit
2017-11-02 16:42 ` [dpdk-dev] [PATCH v5 0/8] net/mlx4: Tx path improvements Matan Azrad
2017-11-02 16:42 ` [dpdk-dev] [PATCH v5 1/8] net/mlx4: remove error flows from Tx fast path Matan Azrad
2017-11-02 16:42 ` [dpdk-dev] [PATCH v5 2/8] net/mlx4: associate MR to MP in a short function Matan Azrad
2017-11-02 16:42 ` [dpdk-dev] [PATCH v5 3/8] net/mlx4: fix ring wraparound compiler hint Matan Azrad
2017-11-02 16:42 ` [dpdk-dev] [PATCH v5 4/8] net/mlx4: merge Tx path functions Matan Azrad
2017-11-02 16:42 ` [dpdk-dev] [PATCH v5 5/8] net/mlx4: remove duplicate handling in Tx burst Matan Azrad
2017-11-02 16:42 ` [dpdk-dev] [PATCH v5 6/8] net/mlx4: separate Tx segment cases Matan Azrad
2017-11-02 16:42 ` [dpdk-dev] [PATCH v5 7/8] net/mlx4: fix HW memory optimizations careless Matan Azrad
2017-11-02 16:42 ` [dpdk-dev] [PATCH v5 8/8] net/mlx4: mitigate Tx path memory barriers Matan Azrad
2017-11-02 17:07 ` [dpdk-dev] [PATCH v5 0/8] net/mlx4: Tx path improvements Adrien Mazarguil
2017-11-02 20:35 ` Ferruh Yigit
2017-11-02 20:41 ` Ferruh Yigit
2017-11-03 9:48 ` Adrien Mazarguil
2017-11-03 19:25 ` Ferruh Yigit
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