From: Adrien Mazarguil <adrien.mazarguil@6wind.com>
To: "Rybalchenko, Kirill" <kirill.rybalchenko@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
"Wu, Jingjing" <jingjing.wu@intel.com>,
"Xing, Beilei" <beilei.xing@intel.com>,
"johndale@cisco.com" <johndale@cisco.com>,
"neescoba@cisco.com" <neescoba@cisco.com>,
"nelio.laranjeiro@6wind.com" <nelio.laranjeiro@6wind.com>,
"yskoh@mellanox.com" <yskoh@mellanox.com>,
"Lu, Wenzhuo" <wenzhuo.lu@intel.com>,
"Ananyev, Konstantin" <konstantin.ananyev@intel.com>,
"Chilikin, Andrey" <andrey.chilikin@intel.com>
Subject: Re: [dpdk-dev] [PATCH] ethdev: increase flow type limit from 32 to 64
Date: Tue, 16 Jan 2018 12:13:26 +0100 [thread overview]
Message-ID: <20180116111326.GD4256@6wind.com> (raw)
In-Reply-To: <696B43C21188DF4F9C9091AAE4789B824E2B6786@IRSMSX108.ger.corp.intel.com>
On Tue, Jan 09, 2018 at 03:16:13PM +0000, Rybalchenko, Kirill wrote:
> > -----Original Message-----
> > From: Adrien Mazarguil [mailto:adrien.mazarguil@6wind.com]
> > Sent: Monday 4 December 2017 17:43
> > To: Rybalchenko, Kirill <kirill.rybalchenko@intel.com>
> > Cc: dev@dpdk.org; Wu, Jingjing <jingjing.wu@intel.com>; Xing, Beilei
> > <beilei.xing@intel.com>; johndale@cisco.com; neescoba@cisco.com;
> > nelio.laranjeiro@6wind.com; yskoh@mellanox.com; Lu, Wenzhuo
> > <wenzhuo.lu@intel.com>; Ananyev, Konstantin
> > <konstantin.ananyev@intel.com>; Chilikin, Andrey
> > <andrey.chilikin@intel.com>
> > Subject: Re: [PATCH] ethdev: increase flow type limit from 32 to 64
> >
> > Hi Kirill,
> >
> > On Mon, Nov 27, 2017 at 12:29:47PM +0000, Kirill Rybalchenko wrote:
> > > Increase the internal limit for flow types from 32 to 64 to support
> > > future flow type extensions.
> > > Change type of variables from uint32_t[] to uint64_t[]:
> > > rte_eth_fdir_info.flow_types_mask
> > > rte_eth_hash_global_conf.sym_hash_enable_mask
> > > rte_eth_hash_global_conf.valid_bit_mask
> > >
> > > This modification affects the following components:
> > > net/i40e
> > > net/enic
> > > net/mlx5
> > > net/ixgbe
> > > app/testpmd
> > >
> > > Signed-off-by: Kirill Rybalchenko <kirill.rybalchenko@intel.com>
> >
> > Can you elaborate a bit on the need for these changes?
> > Have you considered implementing those future extensions through
> > rte_flow instead?
>
> Hi Adrien, this is not a new feature but rather fix of existing limitation.
> In current implementation the symmetric hash mask and flow mask are
> represented by 32-bit variable, while hardware bitmask has 64 bits.
> Unfortunately, this modification changes ABI of the library as it changes size
> of rte_eth_fdir_info structure. All related PMDs (listed above) had to be modified
> accordingly.
OK, no problem with this change. I assume you'll re-submit it since you sent
a deprecation notice, we'll review/ack subsequent mlx5 patches.
--
Adrien Mazarguil
6WIND
next prev parent reply other threads:[~2018-01-16 11:13 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-27 12:29 Kirill Rybalchenko
2017-12-04 17:43 ` Adrien Mazarguil
2018-01-09 15:16 ` Rybalchenko, Kirill
2018-01-10 13:50 ` Thomas Monjalon
2018-01-16 11:13 ` Adrien Mazarguil [this message]
2018-01-16 17:23 ` Rybalchenko, Kirill
2018-01-16 18:03 ` Adrien Mazarguil
2018-01-09 14:30 ` Zhang, Helin
2018-01-10 6:51 ` Xing, Beilei
2018-01-15 16:58 ` [dpdk-dev] [PATCH v2] " Kirill Rybalchenko
2018-01-15 17:33 ` [dpdk-dev] [PATCH v3] " Kirill Rybalchenko
2018-01-15 21:27 ` Thomas Monjalon
2018-01-16 9:44 ` Rybalchenko, Kirill
2018-01-16 9:47 ` Thomas Monjalon
2018-01-16 10:31 ` Rybalchenko, Kirill
2018-01-16 10:38 ` Thomas Monjalon
2018-01-17 16:56 ` Ferruh Yigit
2018-01-18 9:24 ` Rybalchenko, Kirill
2018-01-18 12:25 ` Ferruh Yigit
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