From: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>
To: Joyce Kong <joyce.kong@arm.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: "nd@arm.com" <nd@arm.com>,
"jerinj@marvell.com" <jerinj@marvell.com>,
"chaozhu@linux.vnet.ibm.com" <chaozhu@linux.vnet.ibm.com>,
"Richardson, Bruce" <bruce.richardson@intel.com>,
"thomas@monjalon.net" <thomas@monjalon.net>,
"hemant.agrawal@nxp.com" <hemant.agrawal@nxp.com>,
"honnappa.nagarahalli@arm.com" <honnappa.nagarahalli@arm.com>,
"gavin.hu@arm.com" <gavin.hu@arm.com>
Subject: Re: [dpdk-dev] [PATCH v4 1/3] rwlock: reimplement with atomic builtins
Date: Thu, 21 Mar 2019 18:43:21 +0000 [thread overview]
Message-ID: <2601191342CEEE43887BDE71AB977258013655E71E@irsmsx105.ger.corp.intel.com> (raw)
Message-ID: <20190321184321.3BI2xxX-EbVATCNlWu-G6bCniMglvTgeLDmuaOoP1BY@z> (raw)
In-Reply-To: <1553063109-57574-2-git-send-email-joyce.kong@arm.com>
> -----Original Message-----
> From: Joyce Kong [mailto:joyce.kong@arm.com]
> Sent: Wednesday, March 20, 2019 6:25 AM
> To: dev@dpdk.org
> Cc: nd@arm.com; jerinj@marvell.com; Ananyev, Konstantin <konstantin.ananyev@intel.com>; chaozhu@linux.vnet.ibm.com; Richardson,
> Bruce <bruce.richardson@intel.com>; thomas@monjalon.net; hemant.agrawal@nxp.com; honnappa.nagarahalli@arm.com;
> gavin.hu@arm.com
> Subject: [PATCH v4 1/3] rwlock: reimplement with atomic builtins
>
> The __sync builtin based implementation generates full memory
> barriers ('dmb ish') on Arm platforms. Using C11 atomic builtins
> to generate one way barriers.
>
> Here is the assembly code of __sync_compare_and_swap builtin.
> __sync_bool_compare_and_swap(dst, exp, src);
> 0x000000000090f1b0 <+16>: e0 07 40 f9 ldr x0, [sp, #8]
> 0x000000000090f1b4 <+20>: e1 0f 40 79 ldrh w1, [sp, #6]
> 0x000000000090f1b8 <+24>: e2 0b 40 79 ldrh w2, [sp, #4]
> 0x000000000090f1bc <+28>: 21 3c 00 12 and w1, w1, #0xffff
> 0x000000000090f1c0 <+32>: 03 7c 5f 48 ldxrh w3, [x0]
> 0x000000000090f1c4 <+36>: 7f 00 01 6b cmp w3, w1
> 0x000000000090f1c8 <+40>: 61 00 00 54 b.ne 0x90f1d4
> <rte_atomic16_cmpset+52> // b.any
> 0x000000000090f1cc <+44>: 02 fc 04 48 stlxrh w4, w2, [x0]
> 0x000000000090f1d0 <+48>: 84 ff ff 35 cbnz w4, 0x90f1c0
> <rte_atomic16_cmpset+32>
> 0x000000000090f1d4 <+52>: bf 3b 03 d5 dmb ish
> 0x000000000090f1d8 <+56>: e0 17 9f 1a cset w0, eq // eq = none
>
> Signed-off-by: Gavin Hu <gavin.hu@arm.com>
> Signed-off-by: Joyce Kong <joyce.kong@arm.com>
> Tested-by: Joyce Kong <joyce.kong@arm.com>
> Acked-by: Jerin Jacob <jerinj@marvell.com>
> ---
> lib/librte_eal/common/include/generic/rte_rwlock.h | 29 +++++++++++-----------
> 1 file changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/lib/librte_eal/common/include/generic/rte_rwlock.h b/lib/librte_eal/common/include/generic/rte_rwlock.h
> index b05d85a..de94ca9 100644
> --- a/lib/librte_eal/common/include/generic/rte_rwlock.h
> +++ b/lib/librte_eal/common/include/generic/rte_rwlock.h
> @@ -64,14 +64,14 @@ rte_rwlock_read_lock(rte_rwlock_t *rwl)
> int success = 0;
>
> while (success == 0) {
> - x = rwl->cnt;
> + x = __atomic_load_n(&rwl->cnt, __ATOMIC_RELAXED);
> /* write lock is held */
> if (x < 0) {
> rte_pause();
> continue;
> }
> - success = rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt,
> - (uint32_t)x, (uint32_t)(x + 1));
> + success = __atomic_compare_exchange_n(&rwl->cnt, &x, x+1, 1,
As a nit, here and in trylock: 'x+1' spaces missing, needs to be 'x + 1'.
Apart from that:
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
next prev parent reply other threads:[~2019-03-21 18:47 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-13 3:37 [dpdk-dev] [PATCH v1 0/2] reimplement rwlock and add relevant perf test case Joyce Kong
2018-12-13 3:37 ` [dpdk-dev] [PATCH v1 1/2] test/rwlock: add " Joyce Kong
2018-12-19 23:34 ` Ananyev, Konstantin
2018-12-20 1:01 ` Gavin Hu (Arm Technology China)
2018-12-20 1:45 ` Honnappa Nagarahalli
2019-03-14 13:15 ` [dpdk-dev] [PATCH v3 0/3] rwlock: reimplement rwlock with atomic and add relevant " Joyce Kong
2019-03-14 13:15 ` Joyce Kong
2019-03-14 13:15 ` [dpdk-dev] [PATCH v3 1/3] rwlock: reimplement with atomic builtins Joyce Kong
2019-03-14 13:15 ` Joyce Kong
2019-03-14 15:54 ` Stephen Hemminger
2019-03-14 15:54 ` Stephen Hemminger
2019-03-15 3:04 ` Gavin Hu (Arm Technology China)
2019-03-15 3:04 ` Gavin Hu (Arm Technology China)
2019-03-15 11:41 ` Ananyev, Konstantin
2019-03-15 11:41 ` Ananyev, Konstantin
2019-03-19 8:31 ` Gavin Hu (Arm Technology China)
2019-03-19 8:31 ` Gavin Hu (Arm Technology China)
2019-03-14 13:15 ` [dpdk-dev] [PATCH v3 2/3] test/rwlock: add perf test case on all available cores Joyce Kong
2019-03-14 13:15 ` Joyce Kong
2019-03-14 13:15 ` [dpdk-dev] [PATCH v3 3/3] test/rwlock: amortize the cost of getting time Joyce Kong
2019-03-14 13:15 ` Joyce Kong
2019-03-14 15:02 ` Honnappa Nagarahalli
2019-03-14 15:02 ` Honnappa Nagarahalli
2019-03-20 6:25 ` [dpdk-dev] [PATCH v4 0/3] rwlock: reimplement rwlock with atomic and add relevant perf test case Joyce Kong
2019-03-20 6:25 ` Joyce Kong
2019-03-20 6:25 ` [dpdk-dev] [PATCH v4 1/3] rwlock: reimplement with atomic builtins Joyce Kong
2019-03-20 6:25 ` Joyce Kong
2019-03-21 18:43 ` Ananyev, Konstantin [this message]
2019-03-21 18:43 ` Ananyev, Konstantin
2019-03-25 9:18 ` Joyce Kong (Arm Technology China)
2019-03-25 9:18 ` Joyce Kong (Arm Technology China)
2019-03-20 6:25 ` [dpdk-dev] [PATCH v4 2/3] test/rwlock: add perf test case on all available cores Joyce Kong
2019-03-20 6:25 ` Joyce Kong
2019-03-21 18:44 ` Ananyev, Konstantin
2019-03-21 18:44 ` Ananyev, Konstantin
2019-03-20 6:25 ` [dpdk-dev] [PATCH v4 3/3] test/rwlock: amortize the cost of getting time Joyce Kong
2019-03-20 6:25 ` Joyce Kong
2019-03-21 18:44 ` Ananyev, Konstantin
2019-03-21 18:44 ` Ananyev, Konstantin
2019-03-25 9:14 ` [dpdk-dev] [PATCH v5 0/3] rwlock: reimplement rwlock with atomic and add relevant perf test case Joyce Kong
2019-03-25 9:14 ` Joyce Kong
2019-03-28 10:50 ` Thomas Monjalon
2019-03-28 10:50 ` Thomas Monjalon
2019-04-16 14:57 ` Kevin Traynor
2019-04-16 14:57 ` Kevin Traynor
2019-03-25 9:14 ` [dpdk-dev] [PATCH v5 1/3] rwlock: reimplement with atomic builtins Joyce Kong
2019-03-25 9:14 ` Joyce Kong
2019-03-25 9:14 ` [dpdk-dev] [PATCH v5 2/3] test/rwlock: add perf test case on all available cores Joyce Kong
2019-03-25 9:14 ` Joyce Kong
2019-03-25 9:14 ` [dpdk-dev] [PATCH v5 3/3] test/rwlock: amortize the cost of getting time Joyce Kong
2019-03-25 9:14 ` Joyce Kong
2018-12-13 3:37 ` [dpdk-dev] [PATCH v1 2/2] rwlock: reimplement with __atomic builtins Joyce Kong
2018-12-19 23:50 ` Ananyev, Konstantin
2018-12-13 5:27 ` [dpdk-dev] [PATCH v1 0/2] reimplement rwlock and add relevant perf test case Stephen Hemminger
2018-12-14 1:30 ` Gavin Hu (Arm Technology China)
2018-12-17 5:16 ` Honnappa Nagarahalli
2018-12-19 20:37 ` Thomas Monjalon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2601191342CEEE43887BDE71AB977258013655E71E@irsmsx105.ger.corp.intel.com \
--to=konstantin.ananyev@intel.com \
--cc=bruce.richardson@intel.com \
--cc=chaozhu@linux.vnet.ibm.com \
--cc=dev@dpdk.org \
--cc=gavin.hu@arm.com \
--cc=hemant.agrawal@nxp.com \
--cc=honnappa.nagarahalli@arm.com \
--cc=jerinj@marvell.com \
--cc=joyce.kong@arm.com \
--cc=nd@arm.com \
--cc=thomas@monjalon.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).