From: <kirankumark@marvell.com>
To: Jerin Jacob <jerinj@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>
Cc: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH] net/octeontx2: enable full flow control for HIGIG
Date: Thu, 30 Jan 2020 21:31:51 +0530 [thread overview]
Message-ID: <20200130160151.18000-1-kirankumark@marvell.com> (raw)
From: Kiran Kumar K <kirankumark@marvell.com>
Due to following errata (NIX-35687) 2019-03-20 A0 CatA Link
credit deadlock, We disabled Tx flow control. Add check to enable
the full flow control in HIGIG mode.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
---
drivers/net/octeontx2/otx2_flow_ctrl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/octeontx2/otx2_flow_ctrl.c b/drivers/net/octeontx2/otx2_flow_ctrl.c
index c6d7b1971..1c6929e76 100644
--- a/drivers/net/octeontx2/otx2_flow_ctrl.c
+++ b/drivers/net/octeontx2/otx2_flow_ctrl.c
@@ -213,6 +213,7 @@ otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev)
/* To avoid Link credit deadlock on Ax, disable Tx FC if it's enabled */
if (otx2_dev_is_Ax(dev) &&
+ (dev->npc_flow.switch_header_type != OTX2_PRIV_FLAGS_HIGIG) &&
(fc_conf.mode == RTE_FC_FULL || fc_conf.mode == RTE_FC_RX_PAUSE)) {
fc_conf.mode =
(fc_conf.mode == RTE_FC_FULL ||
--
2.17.1
next reply other threads:[~2020-01-30 16:02 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-30 16:01 kirankumark [this message]
2020-01-30 16:23 ` [dpdk-dev] [PATCH v2] " kirankumark
2020-02-03 9:42 ` Jerin Jacob
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