From: Ruifeng Wang <ruifeng.wang@arm.com>
To: "Wei Hu (Xavier)" <xavier.huwei@huawei.com>,
"Min Hu (Connor)" <humin29@huawei.com>,
Yisen Zhuang <yisen.zhuang@huawei.com>,
Lijun Ou <oulijun@huawei.com>,
Chengwen Feng <fengchengwen@huawei.com>,
Chengchang Tang <tangchengchang@huawei.com>,
Huisong Li <lihuisong@huawei.com>
Cc: dev@dpdk.org, vladimir.medvedkin@intel.com,
pbhagavatula@marvell.com, jerinj@marvell.com,
hemant.agrawal@nxp.com, honnappa.nagarahalli@arm.com, nd@arm.com,
Ruifeng Wang <ruifeng.wang@arm.com>,
stable@dpdk.org
Subject: [dpdk-stable] [PATCH v3 2/5] net/hns3: fix build with sve enabled
Date: Tue, 12 Jan 2021 02:57:05 +0000 [thread overview]
Message-ID: <20210112025709.1121523-3-ruifeng.wang@arm.com> (raw)
In-Reply-To: <20210112025709.1121523-1-ruifeng.wang@arm.com>
Building with SVE extension enabled stopped with error:
error: ACLE function ‘svwhilelt_b64_s32’ requires ISA extension ‘sve’
18 | #define PG64_256BIT svwhilelt_b64(0, 4)
This is caused by unintentional cflags reset.
Fixed the issue by not touching cflags, and using flags defined by
compiler.
Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx")
Cc: stable@dpdk.org
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
v3:
Removed extra flag, use compiler flag instead.
drivers/net/hns3/hns3_rxtx.c | 4 ++--
drivers/net/hns3/meson.build | 1 -
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index 88d3baba4..5ac36b314 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -10,7 +10,7 @@
#include <rte_io.h>
#include <rte_net.h>
#include <rte_malloc.h>
-#if defined(RTE_ARCH_ARM64) && defined(CC_SVE_SUPPORT)
+#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_SVE)
#include <rte_cpuflags.h>
#endif
@@ -2467,7 +2467,7 @@ hns3_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
static bool
hns3_check_sve_support(void)
{
-#if defined(RTE_ARCH_ARM64) && defined(CC_SVE_SUPPORT)
+#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_SVE)
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SVE))
return true;
#endif
diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build
index 45cee34d9..5674d986b 100644
--- a/drivers/net/hns3/meson.build
+++ b/drivers/net/hns3/meson.build
@@ -32,7 +32,6 @@ deps += ['hash']
if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64')
sources += files('hns3_rxtx_vec.c')
if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
- cflags = ['-DCC_SVE_SUPPORT']
sources += files('hns3_rxtx_vec_sve.c')
endif
endif
--
2.25.1
next prev parent reply other threads:[~2021-01-12 2:58 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20201218101210.356836-1-ruifeng.wang@arm.com>
[not found] ` <20210108082523.1062058-1-ruifeng.wang@arm.com>
2021-01-08 8:25 ` [dpdk-stable] [PATCH v2 " Ruifeng Wang
2021-01-09 0:06 ` Honnappa Nagarahalli
2021-01-09 2:11 ` oulijun
2021-01-11 2:39 ` Ruifeng Wang
2021-01-11 13:38 ` Honnappa Nagarahalli
2021-01-09 2:15 ` oulijun
2021-01-11 2:27 ` Ruifeng Wang
2021-01-08 8:25 ` [dpdk-stable] [PATCH v2 3/5] net/octeontx: " Ruifeng Wang
2021-01-08 8:25 ` [dpdk-stable] [PATCH v2 4/5] common/octeontx2: " Ruifeng Wang
2021-01-08 10:29 ` [dpdk-stable] [EXT] " Pavan Nikhilesh Bhagavatula
2021-01-11 9:51 ` Ruifeng Wang
[not found] ` <20210112025709.1121523-1-ruifeng.wang@arm.com>
2021-01-12 2:57 ` Ruifeng Wang [this message]
2021-01-13 2:16 ` [dpdk-stable] [PATCH v3 2/5] net/hns3: " Honnappa Nagarahalli
2021-01-12 2:57 ` [dpdk-stable] [PATCH v3 3/5] net/octeontx: " Ruifeng Wang
2021-01-12 4:39 ` [dpdk-stable] [dpdk-dev] " Jerin Jacob
2021-01-12 2:57 ` [dpdk-stable] [PATCH v3 4/5] common/octeontx2: " Ruifeng Wang
2021-01-12 4:38 ` [dpdk-stable] [dpdk-dev] " Jerin Jacob
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