From: Spike Du <spiked@nvidia.com>
To: <matan@nvidia.com>, <viacheslavo@nvidia.com>, <orika@nvidia.com>,
<thomas@monjalon.net>
Cc: <dev@dpdk.org>, <rasland@nvidia.com>
Subject: [RFC v1 7/7] app/testpmd: add LWM and Host Shaper command
Date: Fri, 6 May 2022 06:56:45 +0300 [thread overview]
Message-ID: <20220506035645.4101714-8-spiked@nvidia.com> (raw)
In-Reply-To: <20220506035645.4101714-1-spiked@nvidia.com>
Add command line options to support LWM per-rxq configure.
- Command syntax:
set port <port_id> rxq <rxq_id> lwm <lwm_num>
mlx5 set port <port_id> host_shaper lwm_triggered <0|1> rate <rate_num>
- Example commands:
To configure LWM as 30% of rxq size on port 1 rxq 0:
testpmd> set port 1 rxq 0 lwm 30
To disable LWM on port 1 rxq 0:
testpmd> set port 1 rxq 0 lwm 0
To enable lwm_triggered on port 1 and disable current host shaper:
testpmd> mlx5 set port 1 host_shaper lwm_triggered 1 rate 0
To disable lwm_triggered and current host shaper on port 1:
testpmd> mlx5 set port 1 host_shaper lwm_triggered 0 rate 0
The rate unit is 100Mbps.
To disable lwm_triggered and configure a shaper of 5Gbps on port 1:
testpmd> mlx5 set port 1 host_shaper lwm_triggered 0 rate 50
Add sample code to handle rxq LWM event, it delays a while so that rxq
empties, then disables host shaper and rearms LWM event.
Signed-off-by: Spike Du <spiked@nvidia.com>
---
app/test-pmd/cmdline.c | 74 +++++++++++++++++
app/test-pmd/config.c | 23 ++++++
app/test-pmd/meson.build | 3 +
app/test-pmd/testpmd.c | 13 +++
app/test-pmd/testpmd.h | 1 +
doc/guides/nics/mlx5.rst | 76 +++++++++++++++++
drivers/net/mlx5/meson.build | 7 +-
drivers/net/mlx5/mlx5_test.c | 191 +++++++++++++++++++++++++++++++++++++++++++
drivers/net/mlx5/mlx5_test.h | 27 ++++++
9 files changed, 413 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/mlx5/mlx5_test.c
create mode 100644 drivers/net/mlx5/mlx5_test.h
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 6ffea8e..f98cdf5 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -67,6 +67,9 @@
#include "cmdline_mtr.h"
#include "cmdline_tm.h"
#include "bpf_cmd.h"
+#ifdef RTE_NET_MLX5
+#include "mlx5_test.h"
+#endif
static struct cmdline *testpmd_cl;
@@ -17807,6 +17810,73 @@ struct cmd_show_port_flow_transfer_proxy_result {
}
};
+/* *** SET LIMIT WARTER MARK FOR A RXQ OF A PORT *** */
+struct cmd_rxq_lwm_result {
+ cmdline_fixed_string_t set;
+ cmdline_fixed_string_t port;
+ uint16_t port_num;
+ cmdline_fixed_string_t rxq;
+ uint16_t rxq_num;
+ cmdline_fixed_string_t lwm;
+ uint16_t lwm_num;
+};
+
+static void cmd_rxq_lwm_parsed(void *parsed_result,
+ __rte_unused struct cmdline *cl,
+ __rte_unused void *data)
+{
+ struct cmd_rxq_lwm_result *res = parsed_result;
+ int ret = 0;
+
+ if ((strcmp(res->set, "set") == 0) && (strcmp(res->port, "port") == 0)
+ && (strcmp(res->rxq, "rxq") == 0)
+ && (strcmp(res->lwm, "lwm") == 0))
+ ret = set_rxq_lwm(res->port_num, res->rxq_num,
+ res->lwm_num);
+ if (ret < 0)
+ printf("rxq_lwm_cmd error: (%s)\n", strerror(-ret));
+
+}
+
+cmdline_parse_token_string_t cmd_rxq_lwm_set =
+ TOKEN_STRING_INITIALIZER(struct cmd_rxq_lwm_result,
+ set, "set");
+cmdline_parse_token_string_t cmd_rxq_lwm_port =
+ TOKEN_STRING_INITIALIZER(struct cmd_rxq_lwm_result,
+ port, "port");
+cmdline_parse_token_num_t cmd_rxq_lwm_portnum =
+ TOKEN_NUM_INITIALIZER(struct cmd_rxq_lwm_result,
+ port_num, RTE_UINT16);
+cmdline_parse_token_string_t cmd_rxq_lwm_rxq =
+ TOKEN_STRING_INITIALIZER(struct cmd_rxq_lwm_result,
+ rxq, "rxq");
+cmdline_parse_token_num_t cmd_rxq_lwm_rxqnum =
+ TOKEN_NUM_INITIALIZER(struct cmd_rxq_lwm_result,
+ rxq_num, RTE_UINT8);
+cmdline_parse_token_string_t cmd_rxq_lwm_lwm =
+ TOKEN_STRING_INITIALIZER(struct cmd_rxq_lwm_result,
+ lwm, "lwm");
+cmdline_parse_token_num_t cmd_rxq_lwm_lwmnum =
+ TOKEN_NUM_INITIALIZER(struct cmd_rxq_lwm_result,
+ lwm_num, RTE_UINT16);
+
+cmdline_parse_inst_t cmd_rxq_lwm = {
+ .f = cmd_rxq_lwm_parsed,
+ .data = (void *)0,
+ .help_str = "set port <port_id> rxq <rxq_id> lwm <lwm_num>"
+ "Set lwm for rxq on port_id",
+ .tokens = {
+ (void *)&cmd_rxq_lwm_set,
+ (void *)&cmd_rxq_lwm_port,
+ (void *)&cmd_rxq_lwm_portnum,
+ (void *)&cmd_rxq_lwm_rxq,
+ (void *)&cmd_rxq_lwm_rxqnum,
+ (void *)&cmd_rxq_lwm_lwm,
+ (void *)&cmd_rxq_lwm_lwmnum,
+ NULL,
+ },
+};
+
/* ******************************************************************************** */
/* list of instructions */
@@ -18093,6 +18163,10 @@ struct cmd_show_port_flow_transfer_proxy_result {
(cmdline_parse_inst_t *)&cmd_show_capability,
(cmdline_parse_inst_t *)&cmd_set_flex_is_pattern,
(cmdline_parse_inst_t *)&cmd_set_flex_spec_pattern,
+ (cmdline_parse_inst_t *)&cmd_rxq_lwm,
+#ifdef RTE_NET_MLX5
+ (cmdline_parse_inst_t *)&_rte_pmd_mlx5_cmd_port_host_shaper,
+#endif
NULL,
};
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index cc8e7aa..609fde1 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -6281,3 +6281,26 @@ struct igb_ring_desc_16_bytes {
printf(" %s\n", buf);
}
}
+
+int
+set_rxq_lwm(portid_t port_id, uint16_t queue_idx, uint16_t lwm)
+{
+ struct rte_eth_link link;
+ int ret;
+
+ if (port_id_is_invalid(port_id, ENABLED_WARN))
+ return -EINVAL;
+ ret = eth_link_get_nowait_print_err(port_id, &link);
+ if (ret < 0)
+ return -EINVAL;
+ if (lwm > 99)
+ return -EINVAL;
+ ret = rte_eth_rx_queue_set_lwm(port_id, queue_idx, lwm);
+
+ if (ret)
+ return ret;
+ /* Save the input lwm. */
+ ports[port_id].rx_conf[queue_idx].lwm = lwm;
+ return 0;
+}
+
diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
index 43130c8..c4fd379 100644
--- a/app/test-pmd/meson.build
+++ b/app/test-pmd/meson.build
@@ -73,3 +73,6 @@ endif
if dpdk_conf.has('RTE_NET_DPAA')
deps += ['bus_dpaa', 'mempool_dpaa', 'net_dpaa']
endif
+if dpdk_conf.has('RTE_NET_MLX5')
+ deps += 'net_mlx5'
+endif
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index fe2ce19..683374c 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -66,6 +66,9 @@
#ifdef RTE_EXEC_ENV_WINDOWS
#include <process.h>
#endif
+#ifdef RTE_NET_MLX5
+#include "mlx5_test.h"
+#endif
#include "testpmd.h"
@@ -417,6 +420,7 @@ struct fwd_engine * fwd_engines[] = {
[RTE_ETH_EVENT_NEW] = "device probed",
[RTE_ETH_EVENT_DESTROY] = "device released",
[RTE_ETH_EVENT_FLOW_AGED] = "flow aged",
+ [RTE_ETH_EVENT_RXQ_LIMIT_REACHED] = "rxq limit reached",
[RTE_ETH_EVENT_MAX] = NULL,
};
@@ -3539,6 +3543,7 @@ struct pmd_test_command {
eth_event_callback(portid_t port_id, enum rte_eth_event_type type, void *param,
void *ret_param)
{
+ uint16_t rxq_idx;
RTE_SET_USED(param);
RTE_SET_USED(ret_param);
@@ -3570,6 +3575,14 @@ struct pmd_test_command {
ports[port_id].port_status = RTE_PORT_CLOSED;
printf("Port %u is closed\n", port_id);
break;
+ case RTE_ETH_EVENT_RXQ_LIMIT_REACHED:
+ rxq_idx = (uint16_t)(uintptr_t)ret_param;
+ printf("recv rxq_limit_reached event, port:%d rxq_id:%d\n", port_id,
+ rxq_idx);
+#ifdef RTE_NET_MLX5
+ mlx5_test_lwm_event_rxq_limit_reached(port_id, rxq_idx);
+#endif
+ break;
default:
break;
}
diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h
index 31f766c..b570ea7 100644
--- a/app/test-pmd/testpmd.h
+++ b/app/test-pmd/testpmd.h
@@ -1163,6 +1163,7 @@ uint16_t tx_pkt_set_dynf(uint16_t port_id, __rte_unused uint16_t queue,
void flex_item_create(portid_t port_id, uint16_t flex_id, const char *filename);
void flex_item_destroy(portid_t port_id, uint16_t flex_id);
void port_flex_item_flush(portid_t port_id);
+int set_rxq_lwm(portid_t port_id, uint16_t queue_idx, uint16_t lwm);
extern int flow_parse(const char *src, void *result, unsigned int size,
struct rte_flow_attr **attr,
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 4e2ebff..1e6e3c5 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -1688,3 +1688,79 @@ The procedure below is an example of using a ConnectX-5 adapter card (pf0) with
#. For each VF PCIe, using the following command to bind the driver::
$ echo "0000:82:00.2" >> /sys/bus/pci/drivers/mlx5_core/bind
+
+How to use LWM and Host Shaper
+------------------------------
+
+LWM introduction
+~~~~~~~~~~~~~~~~
+
+LWM (Limit WaterMark) is a per Rx queue attribute, it should be configured as
+a percentage of the Rx queue size.
+When Rx queue's available WQE count is below LWM, an event is sent to PMD.
+
+Host shaper introduction
+~~~~~~~~~~~~~~~~~~~~~~~~
+
+Host shaper register is per host port register which sets a shaper
+on the host port.
+All VF/hostPF representors belonging to one host port share one host shaper.
+For example, if representor 0 and representor 1 belong to same host port,
+and a host shaper rate of 1Gbps is configured, the shaper throttles both
+representors' traffic from host.
+Host shaper has two modes for setting the shaper, immediate and deferred to
+LWM event trigger. In immediate mode, the rate limit is configured immediately
+to host shaper. When deferring to LWM trigger, the shaper is not set until an
+LWM event is received by any Rx queue in a VF representor belonging to the host
+port. The only rate supported for deferred mode is 100Mbps (there is no limit
+on the supported rates for immediate mode). In deferred mode, the shaper is set
+on the host port by the firmware upon receiving the LMW event, which allows
+throttling host traffic on LWM events at minimum latency, preventing excess
+drops in the Rx queue.
+
+Testpmd CLI examples
+~~~~~~~~~~~~~~~~~~~~
+
+There are sample command lines to configure LWM in testpmd.
+Testpmd also contains sample logic to handle LWM event.
+The typical workflow is: testpmd configure LWM for Rx queues, enable
+lwm_triggered in host shaper and register a callback, when traffic from host is
+too high and available WQE count runs below LWM, PMD receives an event and
+firmware configures a 100Mbps shaper on host port automatically, then PMD call
+the callback registered previously, which will delay a while to let Rx queue
+empty, then disable host shaper.
+
+Let's assume we have a simple Blue Field 2 setup: port 0 is uplink, port 1
+is VF representor. Each port has 2 Rx queues.
+In order to control traffic from host to ARM, we can enable LWM in testpmd by:
+
+.. code-block:: console
+
+ testpmd> mlx5 set port 1 host_shaper lwm_triggered 1 rate 0
+ testpmd> set port 1 rxq 0 lwm 30
+ testpmd> set port 1 rxq 1 lwm 30
+
+The first command disables current host shaper, and enables LWM triggered mode.
+The left commands configure LWM to 30% of Rx queue size for both Rx queues,
+When traffic from host is too high, you can see testpmd console prints log
+about LWM event receiving, then host shaper is disabled.
+The traffic rate from host is controlled and less drop happens in Rx queues.
+
+When disable LWM and lwm_triggered, we can invoke below commands in testpmd:
+
+.. code-block:: console
+
+ testpmd> mlx5 set port 1 host_shaper lwm_triggered 0 rate 0
+ testpmd> set port 1 rxq 0 lwm 0
+ testpmd> set port 1 rxq 1 lwm 0
+
+It's recommended an application disables LWM and lwm_triggered before exit,
+if it enables them before.
+
+We can also configure the shaper with a value, the rate unit is 100Mbps, below
+command sets current shaper to 5Gbps and disables lwm_triggered.
+
+.. code-block:: console
+
+ testpmd> mlx5 set port 1 host_shaper lwm_triggered 0 rate 50
+
diff --git a/drivers/net/mlx5/meson.build b/drivers/net/mlx5/meson.build
index 99210fd..4c4eea4 100644
--- a/drivers/net/mlx5/meson.build
+++ b/drivers/net/mlx5/meson.build
@@ -8,8 +8,10 @@ if not (is_linux or is_windows)
subdir_done()
endif
-deps += ['hash', 'common_mlx5']
-headers = files('rte_pmd_mlx5.h')
+deps += ['hash', 'common_mlx5', 'cmdline']
+headers = files('rte_pmd_mlx5.h',
+ 'mlx5_test.h',
+ )
sources = files(
'mlx5.c',
'mlx5_ethdev.c',
@@ -38,6 +40,7 @@ sources = files(
'mlx5_vlan.c',
'mlx5_utils.c',
'mlx5_devx.c',
+ 'mlx5_test.c',
)
if is_linux
diff --git a/drivers/net/mlx5/mlx5_test.c b/drivers/net/mlx5/mlx5_test.c
new file mode 100644
index 0000000..43d25fe
--- /dev/null
+++ b/drivers/net/mlx5/mlx5_test.c
@@ -0,0 +1,191 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2021 6WIND S.A.
+ * Copyright 2021 Mellanox Technologies, Ltd
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include <rte_prefetch.h>
+#include <rte_common.h>
+#include <rte_branch_prediction.h>
+#include <rte_ether.h>
+#include <rte_alarm.h>
+#include <mlx5_common.h>
+#include <rte_pmd_mlx5.h>
+#include <rte_ethdev.h>
+#include "mlx5_autoconf.h"
+#include "mlx5_defs.h"
+#include "mlx5.h"
+#include "mlx5_utils.h"
+#include "mlx5_devx.h"
+#include "mlx5_rx.h"
+#include "mlx5_test.h"
+
+static uint8_t host_shaper_lwm_triggered[RTE_MAX_ETHPORTS];
+#define SHAPER_DISABLE_DELAY_US 100000 /* 100ms */
+
+/**
+ * Disable the host shaper and re-arm LWM event.
+ *
+ * @param[in] args
+ * uint32_t integer combining port_id and rxq_id.
+ */
+static void
+mlx5_test_host_shaper_disable(void *args)
+{
+ uint32_t port_rxq_id = (uint32_t)(uintptr_t)args;
+ uint16_t port_id = port_rxq_id & 0xffff;
+ uint16_t qid = (port_rxq_id >> 16) & 0xffff;
+ struct rte_eth_rxq_info qinfo;
+
+ printf("%s disable shaper\n", __func__);
+ if (rte_eth_rx_queue_info_get(port_id, qid, &qinfo)) {
+ printf("rx_queue_info_get returns error\n");
+ return;
+ }
+ /* Rearm the LWM event. */
+ if (rte_eth_rx_queue_set_lwm(port_id, qid, qinfo.conf.lwm)) {
+ printf("config lwm returns error\n");
+ return;
+ }
+ /* Only disable the shaper when lwm_triggered is set. */
+ if (host_shaper_lwm_triggered[port_id] &&
+ rte_pmd_mlx5_config_host_shaper(port_id, 0, 0))
+ printf("%s disable shaper returns error\n", __func__);
+}
+
+void
+mlx5_test_lwm_event_rxq_limit_reached(uint16_t port_id, uint16_t rxq_id)
+{
+ uint32_t port_rxq_id = port_id | (rxq_id << 16);
+
+ rte_eal_alarm_set(SHAPER_DISABLE_DELAY_US,
+ mlx5_test_host_shaper_disable,
+ (void *)(uintptr_t)port_rxq_id);
+ printf("%s port_id:%u rxq_id:%u\n", __func__, port_id, rxq_id);
+}
+
+/**
+ * Configure host shaper's lwm_triggered and current rate.
+ *
+ * @param[in] lwm_triggered
+ * Disable/enable lwm_triggered.
+ * @param[in] rate
+ * Configure current host shaper rate.
+ * @return
+ * On success, returns 0.
+ * On failure, returns < 0.
+ */
+static int
+mlx5_test_set_port_host_shaper(uint16_t port_id, uint16_t lwm_triggered, uint8_t rate)
+{
+ struct rte_eth_link link;
+ bool port_id_valid = false;
+ uint16_t pid;
+ int ret;
+
+ RTE_ETH_FOREACH_DEV(pid)
+ if (port_id == pid) {
+ port_id_valid = true;
+ break;
+ }
+ if (!port_id_valid)
+ return -EINVAL;
+ ret = rte_eth_link_get_nowait(port_id, &link);
+ if (ret < 0)
+ return ret;
+ host_shaper_lwm_triggered[port_id] = lwm_triggered ? 1 : 0;
+ if (!lwm_triggered) {
+ ret = rte_pmd_mlx5_config_host_shaper(port_id, 0,
+ RTE_BIT32(MLX5_HOST_SHAPER_FLAG_LWM_TRIGGERED));
+ } else {
+ ret = rte_pmd_mlx5_config_host_shaper(port_id, 1,
+ RTE_BIT32(MLX5_HOST_SHAPER_FLAG_LWM_TRIGGERED));
+ }
+ if (ret)
+ return ret;
+ ret = rte_pmd_mlx5_config_host_shaper(port_id, rate, 0);
+ if (ret)
+ return ret;
+ return 0;
+}
+
+/* *** SET HOST_SHAPER FOR A PORT *** */
+struct cmd_port_host_shaper_result {
+ cmdline_fixed_string_t mlx5;
+ cmdline_fixed_string_t set;
+ cmdline_fixed_string_t port;
+ uint16_t port_num;
+ cmdline_fixed_string_t host_shaper;
+ cmdline_fixed_string_t lwm_triggered;
+ uint16_t fr;
+ cmdline_fixed_string_t rate;
+ uint8_t rate_num;
+};
+
+static void cmd_port_host_shaper_parsed(void *parsed_result,
+ __rte_unused struct cmdline *cl,
+ __rte_unused void *data)
+{
+ struct cmd_port_host_shaper_result *res = parsed_result;
+ int ret = 0;
+
+ if ((strcmp(res->mlx5, "mlx5") == 0) &&
+ (strcmp(res->set, "set") == 0) &&
+ (strcmp(res->port, "port") == 0) &&
+ (strcmp(res->host_shaper, "host_shaper") == 0) &&
+ (strcmp(res->lwm_triggered, "lwm_triggered") == 0) &&
+ (strcmp(res->rate, "rate") == 0))
+ ret = mlx5_test_set_port_host_shaper(res->port_num, res->fr,
+ res->rate_num);
+ if (ret < 0)
+ printf("cmd_port_host_shaper error: (%s)\n", strerror(-ret));
+}
+
+cmdline_parse_token_string_t cmd_port_host_shaper_mlx5 =
+ TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,
+ mlx5, "mlx5");
+cmdline_parse_token_string_t cmd_port_host_shaper_set =
+ TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,
+ set, "set");
+cmdline_parse_token_string_t cmd_port_host_shaper_port =
+ TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,
+ port, "port");
+cmdline_parse_token_num_t cmd_port_host_shaper_portnum =
+ TOKEN_NUM_INITIALIZER(struct cmd_port_host_shaper_result,
+ port_num, RTE_UINT16);
+cmdline_parse_token_string_t cmd_port_host_shaper_host_shaper =
+ TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,
+ host_shaper, "host_shaper");
+cmdline_parse_token_string_t cmd_port_host_shaper_lwm_triggered =
+ TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,
+ lwm_triggered, "lwm_triggered");
+cmdline_parse_token_num_t cmd_port_host_shaper_fr =
+ TOKEN_NUM_INITIALIZER(struct cmd_port_host_shaper_result,
+ fr, RTE_UINT16);
+cmdline_parse_token_string_t cmd_port_host_shaper_rate =
+ TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,
+ rate, "rate");
+cmdline_parse_token_num_t cmd_port_host_shaper_rate_num =
+ TOKEN_NUM_INITIALIZER(struct cmd_port_host_shaper_result,
+ rate_num, RTE_UINT8);
+cmdline_parse_inst_t _rte_pmd_mlx5_cmd_port_host_shaper = {
+ .f = cmd_port_host_shaper_parsed,
+ .data = (void *)0,
+ .help_str = "mlx5 set port <port_id> host_shaper lwm_triggered <0|1> "
+ "rate <rate_num>: Set HOST_SHAPER lwm_triggered and rate with port_id",
+ .tokens = {
+ (void *)&cmd_port_host_shaper_mlx5,
+ (void *)&cmd_port_host_shaper_set,
+ (void *)&cmd_port_host_shaper_port,
+ (void *)&cmd_port_host_shaper_portnum,
+ (void *)&cmd_port_host_shaper_host_shaper,
+ (void *)&cmd_port_host_shaper_lwm_triggered,
+ (void *)&cmd_port_host_shaper_fr,
+ (void *)&cmd_port_host_shaper_rate,
+ (void *)&cmd_port_host_shaper_rate_num,
+ NULL,
+ },
+};
diff --git a/drivers/net/mlx5/mlx5_test.h b/drivers/net/mlx5/mlx5_test.h
new file mode 100644
index 0000000..16efe88
--- /dev/null
+++ b/drivers/net/mlx5/mlx5_test.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2021 6WIND S.A.
+ * Copyright 2021 Mellanox Technologies, Ltd
+ */
+
+#ifndef RTE_PMD_MLX5_TEST_H_
+#define RTE_PMD_MLX5_TEST_H_
+
+#include <cmdline_parse.h>
+#include <cmdline_parse_num.h>
+#include <cmdline_parse_string.h>
+
+/**
+ * RTE_ETH_EVENT_RXQ_LIMIT_REACHED handler sample code.
+ * It's called in testpmd, the work flow here is delay a while until
+ * RX queueu is empty, then disable host shaper.
+ *
+ * @param[in] port_id
+ * Port identifier.
+ * @param[in] rxq_id
+ * Rx queue identifier.
+ */
+void
+mlx5_test_lwm_event_rxq_limit_reached(uint16_t port_id, uint16_t rxq_id);
+
+extern cmdline_parse_inst_t _rte_pmd_mlx5_cmd_port_host_shaper;
+#endif
--
1.8.3.1
next prev parent reply other threads:[~2022-05-06 3:57 UTC|newest]
Thread overview: 131+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-01 3:22 [RFC 0/6] net/mlx5: introduce limit watermark and host shaper Spike Du
2022-04-01 3:22 ` [RFC 1/6] net/mlx5: add LWM support for Rxq Spike Du
2022-05-06 3:56 ` [RFC v1 0/7] net/mlx5: introduce limit watermark and host shaper Spike Du
2022-05-06 3:56 ` [RFC v1 1/7] net/mlx5: add LWM support for Rxq Spike Du
2022-05-06 3:56 ` [RFC v1 2/7] common/mlx5: share interrupt management Spike Du
2022-05-06 3:56 ` [RFC v1 3/7] ethdev: introduce Rx queue based limit watermark Spike Du
2022-05-19 9:37 ` Andrew Rybchenko
2022-05-06 3:56 ` [RFC v1 4/7] net/mlx5: add LWM event handling support Spike Du
2022-05-06 3:56 ` [RFC v1 5/7] net/mlx5: support Rx queue based limit watermark Spike Du
2022-05-06 3:56 ` [RFC v1 6/7] net/mlx5: add private API to config host port shaper Spike Du
2022-05-06 3:56 ` Spike Du [this message]
2022-05-22 5:58 ` [RFC v2 0/7] introduce per-queue limit watermark and host shaper Spike Du
2022-05-22 5:58 ` [RFC v2 1/7] net/mlx5: add LWM support for Rxq Spike Du
2022-05-22 5:58 ` [RFC v2 2/7] common/mlx5: share interrupt management Spike Du
2022-05-22 5:58 ` [RFC v2 3/7] ethdev: introduce Rx queue based limit watermark Spike Du
2022-05-22 15:23 ` Stephen Hemminger
2022-05-23 3:01 ` Spike Du
2022-05-23 21:45 ` Thomas Monjalon
2022-05-24 2:50 ` Spike Du
2022-05-24 8:18 ` Thomas Monjalon
2022-05-25 12:59 ` Andrew Rybchenko
2022-05-25 13:58 ` Thomas Monjalon
2022-05-25 14:23 ` Andrew Rybchenko
2022-05-23 22:54 ` Stephen Hemminger
2022-05-24 3:46 ` Spike Du
2022-05-22 15:24 ` Stephen Hemminger
2022-05-23 2:18 ` Spike Du
2022-05-23 6:07 ` Morten Brørup
2022-05-23 10:58 ` Thomas Monjalon
2022-05-23 14:10 ` Spike Du
2022-05-23 14:39 ` Thomas Monjalon
2022-05-24 6:35 ` Andrew Rybchenko
2022-05-24 9:40 ` Morten Brørup
2022-05-22 5:58 ` [RFC v2 4/7] net/mlx5: add LWM event handling support Spike Du
2022-05-22 5:58 ` [RFC v2 5/7] net/mlx5: support Rx queue based limit watermark Spike Du
2022-05-22 5:58 ` [RFC v2 6/7] net/mlx5: add private API to config host port shaper Spike Du
2022-05-22 5:59 ` [RFC v2 7/7] app/testpmd: add LWM and Host Shaper command Spike Du
2022-05-24 15:20 ` [PATCH v3 0/7] introduce per-queue limit watermark and host shaper Spike Du
2022-05-24 15:20 ` [PATCH v3 1/7] net/mlx5: add LWM support for Rxq Spike Du
2022-05-24 15:20 ` [PATCH v3 2/7] common/mlx5: share interrupt management Spike Du
2022-05-24 15:20 ` [PATCH v3 3/7] ethdev: introduce Rx queue based limit watermark Spike Du
2022-05-24 15:20 ` [PATCH v3 4/7] net/mlx5: add LWM event handling support Spike Du
2022-05-24 15:20 ` [PATCH v3 5/7] net/mlx5: support Rx queue based limit watermark Spike Du
2022-05-24 15:20 ` [PATCH v3 6/7] net/mlx5: add private API to config host port shaper Spike Du
2022-05-24 15:20 ` [PATCH v3 7/7] app/testpmd: add LWM and Host Shaper command Spike Du
2022-05-24 15:59 ` [PATCH v3 0/7] introduce per-queue limit watermark and host shaper Thomas Monjalon
2022-05-24 19:00 ` Morten Brørup
2022-05-24 19:22 ` Thomas Monjalon
2022-05-25 14:11 ` Andrew Rybchenko
2022-05-25 13:14 ` Spike Du
2022-05-25 13:40 ` Morten Brørup
2022-05-25 13:59 ` Spike Du
2022-05-25 14:16 ` Morten Brørup
2022-05-25 14:30 ` Andrew Rybchenko
2022-06-03 12:48 ` [PATCH v4 0/7] introduce per-queue fill threshold " Spike Du
2022-06-03 12:48 ` [PATCH v4 1/7] net/mlx5: add LWM support for Rxq Spike Du
2022-06-03 12:48 ` [PATCH v4 2/7] common/mlx5: share interrupt management Spike Du
2022-06-03 14:30 ` Ray Kinsella
2022-06-03 12:48 ` [PATCH v4 3/7] ethdev: introduce Rx queue based fill threshold Spike Du
2022-06-03 14:30 ` Ray Kinsella
2022-06-04 12:46 ` Andrew Rybchenko
2022-06-06 13:16 ` Spike Du
2022-06-06 17:15 ` Andrew Rybchenko
2022-06-06 21:30 ` Thomas Monjalon
2022-06-07 8:02 ` Andrew Rybchenko
2022-06-07 6:00 ` Spike Du
2022-06-06 15:49 ` Stephen Hemminger
2022-06-03 12:48 ` [PATCH v4 4/7] net/mlx5: add LWM event handling support Spike Du
2022-06-03 12:48 ` [PATCH v4 5/7] net/mlx5: support Rx queue based fill threshold Spike Du
2022-06-03 12:48 ` [PATCH v4 6/7] net/mlx5: add private API to config host port shaper Spike Du
2022-06-03 14:55 ` Ray Kinsella
2022-06-03 12:48 ` [PATCH v4 7/7] app/testpmd: add Host Shaper command Spike Du
2022-06-07 12:59 ` [PATCH v5 0/7] introduce per-queue available descriptor threshold and host shaper Spike Du
2022-06-07 12:59 ` [PATCH v5 1/7] net/mlx5: add LWM support for Rxq Spike Du
2022-06-08 20:10 ` Matan Azrad
2022-06-07 12:59 ` [PATCH v5 2/7] common/mlx5: share interrupt management Spike Du
2022-06-07 12:59 ` [PATCH v5 3/7] ethdev: introduce Rx queue based available descriptor threshold Spike Du
2022-06-07 12:59 ` [PATCH v5 4/7] net/mlx5: add LWM event handling support Spike Du
2022-06-07 12:59 ` [PATCH v5 5/7] net/mlx5: support Rx queue based available descriptor threshold Spike Du
2022-06-07 12:59 ` [PATCH v5 6/7] net/mlx5: add private API to config host port shaper Spike Du
2022-06-07 12:59 ` [PATCH v5 7/7] app/testpmd: add Host Shaper command Spike Du
2022-06-09 7:55 ` Andrew Rybchenko
2022-06-10 2:22 ` Spike Du
2022-06-13 2:50 ` [PATCH v6] " Spike Du
2022-06-13 2:50 ` Spike Du
2022-06-14 9:43 ` Singh, Aman Deep
2022-06-14 9:54 ` Spike Du
2022-06-14 12:01 ` [PATCH v7] " Spike Du
2022-06-14 12:01 ` Spike Du
2022-06-15 7:51 ` Matan Azrad
2022-06-15 11:08 ` Thomas Monjalon
2022-06-15 12:58 ` [PATCH v8 0/6] introduce per-queue available descriptor threshold and host shaper Spike Du
2022-06-15 12:58 ` [PATCH v8 1/6] net/mlx5: add LWM support for Rxq Spike Du
2022-06-15 14:43 ` [PATCH v9 0/6] introduce per-queue available descriptor threshold and host shaper Spike Du
2022-06-15 14:43 ` [PATCH v9 1/6] net/mlx5: add LWM support for Rxq Spike Du
2022-06-16 8:41 ` [PATCH v10 0/6] introduce per-queue available descriptor threshold and host shaper Spike Du
2022-06-16 8:41 ` [PATCH v10 1/6] net/mlx5: add LWM support for Rxq Spike Du
2022-06-16 8:41 ` [PATCH v10 2/6] common/mlx5: share interrupt management Spike Du
2022-06-23 16:05 ` Ray Kinsella
2022-06-16 8:41 ` [PATCH v10 3/6] net/mlx5: add LWM event handling support Spike Du
2022-06-16 8:41 ` [PATCH v10 4/6] net/mlx5: support Rx queue based available descriptor threshold Spike Du
2022-06-16 8:41 ` [PATCH v10 5/6] net/mlx5: add private API to config host port shaper Spike Du
2022-06-16 8:41 ` [PATCH v10 6/6] app/testpmd: add Host Shaper command Spike Du
2022-06-19 8:14 ` [PATCH v10 0/6] introduce per-queue available descriptor threshold and host shaper Raslan Darawsheh
2022-06-15 14:43 ` [PATCH v9 2/6] common/mlx5: share interrupt management Spike Du
2022-06-15 14:43 ` [PATCH v9 3/6] net/mlx5: add LWM event handling support Spike Du
2022-06-15 14:43 ` [PATCH v9 4/6] net/mlx5: support Rx queue based available descriptor threshold Spike Du
2022-06-15 14:43 ` [PATCH v9 5/6] net/mlx5: add private API to config host port shaper Spike Du
2022-06-15 14:43 ` [PATCH v9 6/6] app/testpmd: add Host Shaper command Spike Du
2022-06-15 12:58 ` [PATCH v8 2/6] common/mlx5: share interrupt management Spike Du
2022-06-15 12:58 ` [PATCH v8 3/6] net/mlx5: add LWM event handling support Spike Du
2022-06-15 12:58 ` [PATCH v8 4/6] net/mlx5: support Rx queue based available descriptor threshold Spike Du
2022-06-15 12:58 ` [PATCH v8 5/6] net/mlx5: add private API to config host port shaper Spike Du
2022-06-15 12:58 ` [PATCH v8 6/6] app/testpmd: add Host Shaper command Spike Du
2022-06-08 9:43 ` [PATCH v5 0/7] introduce per-queue available descriptor threshold and host shaper Andrew Rybchenko
2022-06-08 16:35 ` [PATCH v6] ethdev: introduce available Rx descriptors threshold Andrew Rybchenko
2022-06-08 17:22 ` Thomas Monjalon
2022-06-08 17:46 ` Thomas Monjalon
2022-06-09 0:17 ` fengchengwen
2022-06-09 7:05 ` Thomas Monjalon
2022-06-10 0:01 ` fengchengwen
2022-04-01 3:22 ` [RFC 2/6] common/mlx5: share interrupt management Spike Du
2022-04-01 3:22 ` [RFC 3/6] net/mlx5: add LWM event handling support Spike Du
2022-04-01 3:22 ` [RFC 4/6] net/mlx5: add private API to configure Rxq LWM Spike Du
2022-04-01 3:22 ` [RFC 5/6] net/mlx5: add private API to config host port shaper Spike Du
2022-04-01 3:22 ` [RFC 6/6] app/testpmd: add LWM and Host Shaper command Spike Du
2022-04-05 8:58 ` [RFC 0/6] net/mlx5: introduce limit watermark and host shaper Jerin Jacob
2022-04-26 2:42 ` Spike Du
2022-05-01 12:50 ` Jerin Jacob
2022-05-02 3:58 ` Spike Du
2022-04-29 5:48 ` Spike Du
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