From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com
Cc: dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,
stable@dpdk.org, Junfeng Guo <junfeng.guo@intel.com>
Subject: [PATCH 30/70] net/ice/base: fix bit finding range over ptype bitmap
Date: Mon, 15 Aug 2022 03:12:26 -0400 [thread overview]
Message-ID: <20220815071306.2910599-31-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20220815071306.2910599-1-qi.z.zhang@intel.com>
The 2nd argument to function ice_find_first_bit is the bitmap size,
(in bits) not a mask. Thus, use of UINT16_MAX or 0xFFFF will allow a
potential run off the end of the ptype array.
Also, the ptype bitmap (i.e., prof->ptypes) is declared with size
ICE_FLOW_PTYPE_MAX, thus finding the bits within this bitmap should
not exceed this bound.
Fixes: 8ebb93942b2c ("net/ice/base: add function to set HW profile for raw flow")
Cc: stable@dpdk.org
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flow.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 54181044f1..b196e51276 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -2561,7 +2561,7 @@ ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle,
u16 fdir_vsi_handle, struct ice_parser_profile *prof,
enum ice_block blk)
{
- int id = ice_find_first_bit(prof->ptypes, UINT16_MAX);
+ int id = ice_find_first_bit(prof->ptypes, ICE_FLOW_PTYPE_MAX);
struct ice_flow_prof_params *params;
u8 fv_words = hw->blk[blk].es.fvw;
enum ice_status status;
--
2.31.1
next prev parent reply other threads:[~2022-08-14 23:04 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20220815071306.2910599-1-qi.z.zhang@intel.com>
2022-08-15 7:12 ` [PATCH 05/70] net/ice/base: fix incorrect division during E822 PTP init Qi Zhang
2022-08-15 7:12 ` [PATCH 07/70] net/ice/base: fix 100M speed Qi Zhang
2022-08-15 7:12 ` [PATCH 09/70] net/ice/base: fix DSCP PFC TLV creation Qi Zhang
2022-08-15 7:12 ` [PATCH 19/70] net/ice/base: fix PHY type 10G SFI C2C to media type mapping Qi Zhang
2022-08-15 7:12 ` [PATCH 25/70] net/ice/base: fix incorrect function descriptions for parser Qi Zhang
2022-08-15 7:12 ` [PATCH 26/70] net/ice/base: fix endian format Qi Zhang
2022-08-15 7:12 ` [PATCH 29/70] net/ice/base: fix array overflow in add switch recipe code Qi Zhang
2022-08-15 7:12 ` Qi Zhang [this message]
2022-08-15 7:12 ` [PATCH 34/70] net/ice/base: fix null pointer dereference during Qi Zhang
2022-08-15 7:12 ` [PATCH 42/70] net/ice/base: fix double VLAN error in promisc mode Qi Zhang
2022-08-15 7:12 ` [PATCH 48/70] net/ice/base: ignore already exist error Qi Zhang
2022-08-15 7:12 ` [PATCH 58/70] net/ice/base: fix wrong inputset of GTPoGRE packet Qi Zhang
[not found] ` <20220815073206.2917968-1-qi.z.zhang@intel.com>
2022-08-15 7:31 ` [PATCH v2 05/70] net/ice/base: fix incorrect division during E822 PTP init Qi Zhang
2022-08-15 7:31 ` [PATCH v2 07/70] net/ice/base: fix 100M speed Qi Zhang
2022-08-15 7:31 ` [PATCH v2 09/70] net/ice/base: fix DSCP PFC TLV creation Qi Zhang
2022-08-15 7:31 ` [PATCH v2 19/70] net/ice/base: fix PHY type 10G SFI C2C to media type mapping Qi Zhang
2022-08-15 7:31 ` [PATCH v2 25/70] net/ice/base: fix incorrect function descriptions for parser Qi Zhang
2022-08-15 7:31 ` [PATCH v2 26/70] net/ice/base: fix endian format Qi Zhang
2022-08-15 7:31 ` [PATCH v2 29/70] net/ice/base: fix array overflow in add switch recipe code Qi Zhang
2022-08-15 7:31 ` [PATCH v2 30/70] net/ice/base: fix bit finding range over ptype bitmap Qi Zhang
2022-08-15 7:31 ` [PATCH v2 34/70] net/ice/base: fix null pointer dereference during Qi Zhang
2022-08-15 7:31 ` [PATCH v2 36/70] net/ice/base: fix add mac rule Qi Zhang
2022-08-15 7:31 ` [PATCH v2 42/70] net/ice/base: fix double VLAN error in promisc mode Qi Zhang
2022-08-15 7:31 ` [PATCH v2 48/70] net/ice/base: ignore already exist error Qi Zhang
2022-08-15 7:31 ` [PATCH v2 58/70] net/ice/base: fix wrong inputset of GTPoGRE packet Qi Zhang
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