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From: Hernan Vargas <hernan.vargas@intel.com>
To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com,
	Hernan Vargas <hernan.vargas@intel.com>,
	stable@dpdk.org
Subject: [PATCH v2 04/37] baseband/acc100: free SW ring mem for reconfiguration
Date: Fri, 19 Aug 2022 19:31:24 -0700	[thread overview]
Message-ID: <20220820023157.189047-5-hernan.vargas@intel.com> (raw)
In-Reply-To: <20220820023157.189047-1-hernan.vargas@intel.com>

Free base address of unaligned memory for SW rings to manage the missed
corner case when there is a reconfiguration.

Fixes: 060e7672930 ("baseband/acc100: add queue configuration")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 7349bb5bad..349b8be5c1 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -340,6 +340,8 @@ alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc100_device *d,
 	int i = 0;
 	uint32_t q_sw_ring_size = ACC100_MAX_QUEUE_DEPTH * get_desc_len();
 	uint32_t dev_sw_ring_size = q_sw_ring_size * num_queues;
+	/* Free first in case this is a reconfiguration */
+	rte_free(d->sw_rings_base);
 
 	/* Find an aligned block of memory to store sw rings */
 	while (i < ACC100_SW_RING_MEM_ALLOC_ATTEMPTS) {
@@ -768,6 +770,7 @@ acc100_dev_close(struct rte_bbdev *dev)
 		rte_free(d->tail_ptrs);
 		rte_free(d->info_ring);
 		rte_free(d->sw_rings_base);
+		rte_free(d->harq_layout);
 		d->sw_rings_base = NULL;
 	}
 	/* Ensure all in flight HW transactions are completed */
@@ -4665,7 +4668,8 @@ poweron_cleanup(struct rte_bbdev *bbdev, struct acc100_device *d,
 	}
 	printf("Number of 5GUL engines %d\n", numEngines);
 
-	rte_free(d->sw_rings_base);
+	if (d->sw_rings_base != NULL)
+		rte_free(d->sw_rings_base);
 	usleep(ACC100_LONG_WAIT);
 }
 
-- 
2.37.1


       reply	other threads:[~2022-08-19 18:36 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20220820023157.189047-1-hernan.vargas@intel.com>
2022-08-20  2:31 ` Hernan Vargas [this message]
2022-09-14 19:22   ` Maxime Coquelin
2022-08-20  2:31 ` [PATCH v2 05/37] baseband/acc100: memory leak fix Hernan Vargas
2022-09-14  8:50   ` Maxime Coquelin
2022-08-20  2:31 ` [PATCH v2 31/37] baseband/acc100: fix clearing PF IR outside handler Hernan Vargas
2022-09-15 10:22   ` Maxime Coquelin
2022-08-20  2:31 ` [PATCH v2 33/37] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-09-15 10:24   ` Maxime Coquelin
2022-08-20  2:31 ` [PATCH v2 36/37] baseband/acc100: make HARQ layout memory 4GB Hernan Vargas
2022-09-15 11:33   ` Maxime Coquelin
2022-08-20  2:31 ` [PATCH v2 37/37] baseband/acc100: reset pointer after rte_free Hernan Vargas
2022-09-15 11:34   ` Maxime Coquelin

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