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From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
	Kiran Kumar K <kirankumark@marvell.com>,
	Sunil Kumar Kori <skori@marvell.com>,
	Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>
Cc: <jerinj@marvell.com>, <dev@dpdk.org>
Subject: [PATCH v2 09/31] common/cnxk: add support to set NPA buf type
Date: Mon, 5 Sep 2022 19:02:06 +0530	[thread overview]
Message-ID: <20220905133228.818616-9-ndabilpuram@marvell.com> (raw)
In-Reply-To: <20220905133228.818616-1-ndabilpuram@marvell.com>

Add support to set/get per-aura buf type with refs and
get sum of all aura limits matching given buf type mask
and val.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
 drivers/common/cnxk/meson.build    |  1 +
 drivers/common/cnxk/roc_npa.c      | 11 ++++
 drivers/common/cnxk/roc_npa.h      | 22 +++++++
 drivers/common/cnxk/roc_npa_priv.h |  8 ++-
 drivers/common/cnxk/roc_npa_type.c | 99 ++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map    |  3 +
 6 files changed, 143 insertions(+), 1 deletion(-)
 create mode 100644 drivers/common/cnxk/roc_npa_type.c

diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build
index 6f808271d1..127fcbcdc5 100644
--- a/drivers/common/cnxk/meson.build
+++ b/drivers/common/cnxk/meson.build
@@ -51,6 +51,7 @@ sources = files(
         'roc_npa.c',
         'roc_npa_debug.c',
         'roc_npa_irq.c',
+        'roc_npa_type.c',
         'roc_npc.c',
         'roc_npc_mcam.c',
         'roc_npc_mcam_dump.c',
diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
index 760a2315b2..ee42434c38 100644
--- a/drivers/common/cnxk/roc_npa.c
+++ b/drivers/common/cnxk/roc_npa.c
@@ -499,6 +499,7 @@ npa_aura_pool_pair_free(struct npa_lf *lf, uint64_t aura_handle)
 	pool_id = aura_id;
 	rc = npa_aura_pool_fini(lf->mbox, aura_id, aura_handle);
 	rc |= npa_stack_dma_free(lf, name, pool_id);
+	memset(&lf->aura_attr[aura_id], 0, sizeof(struct npa_aura_attr));
 
 	plt_bitmap_set(lf->npa_bmp, aura_id);
 
@@ -750,6 +751,13 @@ npa_dev_init(struct npa_lf *lf, uintptr_t base, struct mbox *mbox)
 		goto qint_free;
 	}
 
+	/* Allocate per-aura attribute */
+	lf->aura_attr = plt_zmalloc(sizeof(struct npa_aura_attr) * nr_pools, 0);
+	if (lf->aura_attr == NULL) {
+		rc = NPA_ERR_PARAM;
+		goto lim_free;
+	}
+
 	/* Init aura start & end limits */
 	for (i = 0; i < nr_pools; i++) {
 		lf->aura_lim[i].ptr_start = UINT64_MAX;
@@ -758,6 +766,8 @@ npa_dev_init(struct npa_lf *lf, uintptr_t base, struct mbox *mbox)
 
 	return 0;
 
+lim_free:
+	plt_free(lf->aura_lim);
 qint_free:
 	plt_free(lf->npa_qint_mem);
 bmap_free:
@@ -780,6 +790,7 @@ npa_dev_fini(struct npa_lf *lf)
 	plt_free(lf->npa_qint_mem);
 	plt_bitmap_free(lf->npa_bmp);
 	plt_free(lf->npa_bmp_mem);
+	plt_free(lf->aura_attr);
 
 	return npa_lf_free(lf->mbox);
 }
diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h
index 69129cb4cc..fed1942404 100644
--- a/drivers/common/cnxk/roc_npa.h
+++ b/drivers/common/cnxk/roc_npa.h
@@ -714,6 +714,25 @@ int __roc_api roc_npa_dev_fini(struct roc_npa *roc_npa);
 /* Flags to pool create */
 #define ROC_NPA_ZERO_AURA_F BIT(0)
 
+/* Enumerations */
+enum roc_npa_buf_type {
+	/* Aura used for normal pkts */
+	ROC_NPA_BUF_TYPE_PACKET = 0,
+	/* Aura used for ipsec pkts */
+	ROC_NPA_BUF_TYPE_PACKET_IPSEC,
+	/* Aura used as vwqe for normal pkts */
+	ROC_NPA_BUF_TYPE_VWQE,
+	/* Aura used as vwqe for ipsec pkts */
+	ROC_NPA_BUF_TYPE_VWQE_IPSEC,
+	/* Aura used as SQB for SQ */
+	ROC_NPA_BUF_TYPE_SQB,
+	/* Aura used for general buffer */
+	ROC_NPA_BUF_TYPE_BUF,
+	/* Aura used for timeout pool */
+	ROC_NPA_BUF_TYPE_TIMEOUT,
+	ROC_NPA_BUF_TYPE_END,
+};
+
 /* NPA pool */
 int __roc_api roc_npa_pool_create(uint64_t *aura_handle, uint32_t block_size,
 				  uint32_t block_count, struct npa_aura_s *aura,
@@ -726,6 +745,9 @@ void __roc_api roc_npa_aura_op_range_set(uint64_t aura_handle,
 					 uint64_t start_iova,
 					 uint64_t end_iova);
 uint64_t __roc_api roc_npa_zero_aura_handle(void);
+int __roc_api roc_npa_buf_type_update(uint64_t aura_handle, enum roc_npa_buf_type type, int cnt);
+uint64_t __roc_api roc_npa_buf_type_mask(uint64_t aura_handle);
+uint64_t __roc_api roc_npa_buf_type_limit_get(uint64_t type_mask);
 
 /* Init callbacks */
 typedef int (*roc_npa_lf_init_cb_t)(struct plt_pci_device *pci_dev);
diff --git a/drivers/common/cnxk/roc_npa_priv.h b/drivers/common/cnxk/roc_npa_priv.h
index de3d5448ba..d2118cc4fb 100644
--- a/drivers/common/cnxk/roc_npa_priv.h
+++ b/drivers/common/cnxk/roc_npa_priv.h
@@ -18,6 +18,7 @@ enum npa_error_status {
 
 struct npa_lf {
 	struct plt_intr_handle *intr_handle;
+	struct npa_aura_attr *aura_attr;
 	struct npa_aura_lim *aura_lim;
 	struct plt_pci_device *pci_dev;
 	struct plt_bitmap *npa_bmp;
@@ -25,6 +26,7 @@ struct npa_lf {
 	uint32_t stack_pg_ptrs;
 	uint32_t stack_pg_bytes;
 	uint16_t npa_msixoff;
+	bool zero_aura_rsvd;
 	void *npa_qint_mem;
 	void *npa_bmp_mem;
 	uint32_t nr_pools;
@@ -32,7 +34,7 @@ struct npa_lf {
 	uint8_t aura_sz;
 	uint32_t qints;
 	uintptr_t base;
-	bool zero_aura_rsvd;
+
 };
 
 struct npa_qint {
@@ -45,6 +47,10 @@ struct npa_aura_lim {
 	uint64_t ptr_end;
 };
 
+struct npa_aura_attr {
+	int buf_type[ROC_NPA_BUF_TYPE_END];
+};
+
 struct dev;
 
 static inline struct npa *
diff --git a/drivers/common/cnxk/roc_npa_type.c b/drivers/common/cnxk/roc_npa_type.c
new file mode 100644
index 0000000000..ed90138944
--- /dev/null
+++ b/drivers/common/cnxk/roc_npa_type.c
@@ -0,0 +1,99 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2022 Marvell.
+ */
+
+#include "roc_api.h"
+#include "roc_priv.h"
+
+int
+roc_npa_buf_type_update(uint64_t aura_handle, enum roc_npa_buf_type type, int count)
+{
+	uint64_t aura_id = roc_npa_aura_handle_to_aura(aura_handle);
+	struct npa_lf *lf;
+
+	lf = idev_npa_obj_get();
+	if (lf == NULL || aura_id >= lf->nr_pools)
+		return NPA_ERR_PARAM;
+
+	if (plt_bitmap_get(lf->npa_bmp, aura_id)) {
+		plt_err("Cannot set buf type on unused aura");
+		return NPA_ERR_PARAM;
+	}
+
+	if (type >= ROC_NPA_BUF_TYPE_END || (lf->aura_attr[aura_id].buf_type[type] + count < 0)) {
+		plt_err("Pool buf type invalid");
+		return NPA_ERR_PARAM;
+	}
+
+	lf->aura_attr[aura_id].buf_type[type] += count;
+	plt_wmb();
+	return 0;
+}
+
+uint64_t
+roc_npa_buf_type_mask(uint64_t aura_handle)
+{
+	uint64_t aura_id = roc_npa_aura_handle_to_aura(aura_handle);
+	uint64_t type_mask = 0;
+	struct npa_lf *lf;
+	int type;
+
+	lf = idev_npa_obj_get();
+	if (lf == NULL || aura_id >= lf->nr_pools) {
+		plt_err("Invalid aura id or lf");
+		return 0;
+	}
+
+	if (plt_bitmap_get(lf->npa_bmp, aura_id)) {
+		plt_err("Cannot get buf_type on unused aura");
+		return 0;
+	}
+
+	for (type = 0; type < ROC_NPA_BUF_TYPE_END; type++) {
+		if (lf->aura_attr[aura_id].buf_type[type])
+			type_mask |= BIT_ULL(type);
+	}
+
+	return type_mask;
+}
+
+uint64_t
+roc_npa_buf_type_limit_get(uint64_t type_mask)
+{
+	uint64_t wdata, reg;
+	uint64_t limit = 0;
+	struct npa_lf *lf;
+	uint64_t aura_id;
+	int64_t *addr;
+	uint64_t val;
+	int type;
+
+	lf = idev_npa_obj_get();
+	if (lf == NULL)
+		return NPA_ERR_PARAM;
+
+	for (aura_id = 0; aura_id < lf->nr_pools; aura_id++) {
+		if (plt_bitmap_get(lf->npa_bmp, aura_id))
+			continue;
+
+		/* Find aura's matching the buf_types requested */
+		if (type_mask != 0) {
+			val = 0;
+			for (type = 0; type < ROC_NPA_BUF_TYPE_END; type++) {
+				if (lf->aura_attr[aura_id].buf_type[type] != 0)
+					val |= BIT_ULL(type);
+			}
+			if ((val & type_mask) == 0)
+				continue;
+		}
+
+		wdata = aura_id << 44;
+		addr = (int64_t *)(lf->base + NPA_LF_AURA_OP_LIMIT);
+		reg = roc_atomic64_add_nosync(wdata, addr);
+
+		if (!(reg & BIT_ULL(42)))
+			limit += (reg & ROC_AURA_OP_LIMIT_MASK);
+	}
+
+	return limit;
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 6c05e893e3..6f3de2ab59 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -306,6 +306,9 @@ INTERNAL {
 	roc_nix_vlan_mcam_entry_write;
 	roc_nix_vlan_strip_vtag_ena_dis;
 	roc_nix_vlan_tpid_set;
+	roc_npa_buf_type_mask;
+	roc_npa_buf_type_limit_get;
+	roc_npa_buf_type_update;
 	roc_npa_aura_drop_set;
 	roc_npa_aura_limit_modify;
 	roc_npa_aura_op_range_set;
-- 
2.25.1


  parent reply	other threads:[~2022-09-05 13:35 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-09 18:48 [PATCH 01/23] common/cnxk: fix part value for cn10k Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 02/23] common/cnxk: add cn10ka A1 platform Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 03/23] common/cnxk: update inbound inline IPsec config mailbox Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 04/23] net/cnxk: fix missing fc wait for outbound path in vec mode Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 05/23] common/cnxk: limit meta aura workaround to CN10K A0 Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 06/23] common/cnxk: delay inline device RQ enable to dev start Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 07/23] common/cnxk: reserve aura zero on cn10ka NPA Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 08/23] common/cnxk: add support to set NPA buf type Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 09/23] common/cnxk: update attributes to pools used by NIX Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 10/23] common/cnxk: support zero aura for inline inbound meta Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 11/23] net/cnxk: support for zero aura for inline meta Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 12/23] common/cnxk: avoid the use of platform specific APIs Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 13/23] net/cnxk: use full context IPsec structures in fp Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 14/23] net/cnxk: add crypto capabilities for HMAC-SHA2 Nithin Dabilpuram
2022-08-09 18:48 ` [PATCH 15/23] common/cnxk: enable aging on CN10K platform Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 16/23] common/cnxk: updated shaper profile with red algorithm Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 17/23] common/cnxk: add 98xx A1 platform Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 18/23] net/cnxk: enable additional ciphers for inline Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 19/23] net/cnxk: enable 3des-cbc cipher capability Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 20/23] net/cnxk: skip PFC configuration on LBK Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 21/23] common/cnxk: add support for CPT second pass Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 22/23] common/cnxk: add CQ limit associated with SQ Nithin Dabilpuram
2022-08-09 18:49 ` [PATCH 23/23] common/cnxk: support Tx compl event via RQ to CQ mapping Nithin Dabilpuram
2022-08-30  4:51 ` [PATCH 01/23] common/cnxk: fix part value for cn10k Jerin Jacob
2022-08-30  5:16   ` [EXT] " Nithin Kumar Dabilpuram
2022-09-05 13:31 ` [PATCH v2 01/31] cnxk/net: add fc check in vector event Tx path Nithin Dabilpuram
2022-09-05 13:31   ` [PATCH v2 02/31] common/cnxk: fix part value for cn10k Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 03/31] common/cnxk: add cn10ka A1 platform Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 04/31] common/cnxk: update inbound inline IPsec config mailbox Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 05/31] net/cnxk: fix missing fc wait for outbound path in vec mode Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 06/31] common/cnxk: limit meta aura workaround to CN10K A0 Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 07/31] common/cnxk: delay inline device RQ enable to dev start Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 08/31] common/cnxk: reserve aura zero on cn10ka NPA Nithin Dabilpuram
2022-09-05 13:32   ` Nithin Dabilpuram [this message]
2022-09-05 13:32   ` [PATCH v2 10/31] common/cnxk: update attributes to pools used by NIX Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 11/31] common/cnxk: support zero aura for inline inbound meta Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 12/31] net/cnxk: support for zero aura for inline meta Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 13/31] common/cnxk: avoid the use of platform specific APIs Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 14/31] net/cnxk: use full context IPsec structures in fp Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 15/31] net/cnxk: add crypto capabilities for HMAC-SHA2 Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 16/31] common/cnxk: enable aging on CN10K platform Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 17/31] common/cnxk: updated shaper profile with red algorithm Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 18/31] common/cnxk: add 98xx A1 platform Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 19/31] net/cnxk: enable additional ciphers for inline Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 20/31] net/cnxk: enable 3des-cbc cipher capability Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 21/31] net/cnxk: skip PFC configuration on LBK Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 22/31] common/cnxk: add support for CPT second pass Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 23/31] common/cnxk: add CQ limit associated with SQ Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 24/31] common/cnxk: support Tx compl event via RQ to CQ mapping Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 25/31] event/cnxk: wait for CPT fc on wqe path Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 26/31] net/cnxk: limit port specific SA table size Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 27/31] net/cnxk: add support for crypto cipher DES-CBC Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 28/31] net/cnxk: Add support for crypto auth alg MD5 Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 29/31] net/cnxk: enable esn and antireplay support Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 30/31] common/cnxk: dump device basic info to file Nithin Dabilpuram
2022-09-05 13:32   ` [PATCH v2 31/31] net/cnxk: dumps device private information Nithin Dabilpuram
2022-09-12 13:13 ` [PATCH v3 01/32] net/cnxk: add eth port specific PTP enable Nithin Dabilpuram
2022-09-12 13:13   ` [PATCH v3 02/32] cnxk/net: add fc check in vector event Tx path Nithin Dabilpuram
2022-09-12 13:13   ` [PATCH v3 03/32] common/cnxk: fix part value for cn10k Nithin Dabilpuram
2022-09-12 13:13   ` [PATCH v3 04/32] common/cnxk: add cn10ka A1 platform Nithin Dabilpuram
2022-09-12 13:13   ` [PATCH v3 05/32] common/cnxk: update inbound inline IPsec config mailbox Nithin Dabilpuram
2022-09-12 13:13   ` [PATCH v3 06/32] net/cnxk: fix missing fc wait for outbound path in vec mode Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 07/32] common/cnxk: limit meta aura workaround to CN10K A0 Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 08/32] common/cnxk: delay inline device RQ enable to dev start Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 09/32] common/cnxk: reserve aura zero on cn10ka NPA Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 10/32] common/cnxk: add support to set NPA buf type Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 11/32] common/cnxk: update attributes to pools used by NIX Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 12/32] common/cnxk: support zero aura for inline inbound meta Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 13/32] net/cnxk: support for zero aura for inline meta Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 14/32] common/cnxk: avoid the use of platform specific APIs Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 15/32] net/cnxk: use full context IPsec structures in fp Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 16/32] net/cnxk: add crypto capabilities for HMAC-SHA2 Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 17/32] common/cnxk: enable aging on CN10K platform Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 18/32] common/cnxk: updated shaper profile with red algorithm Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 19/32] common/cnxk: add 98xx A1 platform Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 20/32] net/cnxk: enable additional ciphers for inline Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 21/32] net/cnxk: enable 3des-cbc cipher capability Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 22/32] net/cnxk: skip PFC configuration on LBK Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 23/32] common/cnxk: add support for CPT second pass Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 24/32] common/cnxk: add CQ limit associated with SQ Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 25/32] common/cnxk: support Tx compl event via RQ to CQ mapping Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 26/32] event/cnxk: wait for CPT fc on wqe path Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 27/32] net/cnxk: limit port specific SA table size Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 28/32] net/cnxk: add support for crypto cipher DES-CBC Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 29/32] net/cnxk: add support for crypto auth alg MD5 Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 30/32] net/cnxk: enable esn and antireplay support Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 31/32] common/cnxk: dump device basic info to file Nithin Dabilpuram
2022-09-12 13:14   ` [PATCH v3 32/32] net/cnxk: dumps device private information Nithin Dabilpuram
2022-09-16 11:36     ` Jerin Jacob

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