From: Hernan Vargas <hernan.vargas@intel.com>
To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,
maxime.coquelin@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com,
Hernan Vargas <hernan.vargas@intel.com>,
stable@dpdk.org
Subject: [PATCH v4 06/30] baseband/acc100: check for unlikely operation vals
Date: Tue, 18 Oct 2022 17:38:54 -0700 [thread overview]
Message-ID: <20221019003918.257506-7-hernan.vargas@intel.com> (raw)
In-Reply-To: <20221019003918.257506-1-hernan.vargas@intel.com>
Add unlikely checks for NULL operation values.
Fixes: f404dfe35cc ("baseband/acc100: support 4G processing")
Cc: stable@dpdk.org
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc/rte_acc100_pmd.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index bf0d7d77e7..50c1536dee 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -2179,6 +2179,10 @@ enqueue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
r = op->turbo_enc.tb_params.r;
while (mbuf_total_left > 0 && r < c) {
+ if (unlikely(input == NULL)) {
+ rte_bbdev_log(ERR, "Not enough input segment");
+ return -EINVAL;
+ }
seg_total_left = rte_pktmbuf_data_len(input) - in_offset;
/* Set up DMA descriptor */
desc = acc_desc(q, total_enqueued_cbs);
@@ -3096,6 +3100,8 @@ acc100_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
break;
enqueued_cbs += ret;
}
+ if (unlikely(enqueued_cbs == 0))
+ return 0; /* Nothing to enqueue */
acc_dma_enqueue(q, enqueued_cbs, &q_data->queue_stats);
@@ -3624,6 +3630,8 @@ acc100_dequeue_dec(struct rte_bbdev_queue_data *q_data,
for (i = 0; i < dequeue_num; ++i) {
op = acc_op_tail(q, dequeued_cbs);
+ if (unlikely(op == NULL))
+ break;
if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
ret = dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs,
&aq_dequeued);
@@ -3669,6 +3677,8 @@ acc100_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
for (i = 0; i < dequeue_num; ++i) {
op = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs)
& q->sw_ring_wrap_mask))->req.op_addr;
+ if (unlikely(op == NULL))
+ break;
if (op->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
ret = dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs,
&aq_dequeued);
--
2.37.1
next prev parent reply other threads:[~2022-10-18 16:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20221019003918.257506-1-hernan.vargas@intel.com>
2022-10-19 0:38 ` [PATCH v4 01/30] baseband/acc100: fix ring availability calculation Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 02/30] baseband/acc100: add function to check AQ availability Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 03/30] baseband/acc100: memory leak fix Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 04/30] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-10-20 9:58 ` [EXT] " Akhil Goyal
2022-10-19 0:38 ` [PATCH v4 05/30] baseband/acc100: check turbo dec/enc input Hernan Vargas
2022-10-19 0:38 ` Hernan Vargas [this message]
2022-10-19 0:38 ` [PATCH v4 07/30] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 08/30] baseband/acc100: allocate ring/queue mem when NULL Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 09/30] baseband/acc100: reduce input length for CRC24B Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 10/30] baseband/acc100: fix clearing PF IR outside handler Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 11/30] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 12/30] baseband/acc100: add protection for NULL HARQ input Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 13/30] baseband/acc100: reset pointer after rte_free Hernan Vargas
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