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From: Megha Ajmera <megha.ajmera@intel.com>
To: dev@dpdk.org, jasvinder.singh@intel.com,
	cristian.dumitrescu@intel.com, stephen@networkplumber.org
Cc: stable@dpdk.org
Subject: [PATCH v6 3/3] sched: support for 100G+ rates in subport/pipe config
Date: Fri, 28 Oct 2022 09:55:31 +0000	[thread overview]
Message-ID: <20221028095531.678682-3-megha.ajmera@intel.com> (raw)
In-Reply-To: <20221028095531.678682-1-megha.ajmera@intel.com>

- Config load functions updated to support 100G rates
for subport and pipes.
- Added new parse function to convert string to unsigned
long long.
- Added error checks.
- Fixed format warnings.

Signed-off-by: Megha Ajmera <megha.ajmera@intel.com>
---
 examples/qos_sched/cfg_file.c | 179 +++++++++++++++++++++-------------
 examples/qos_sched/cfg_file.h |   2 +
 examples/qos_sched/init.c     |  23 ++++-
 3 files changed, 133 insertions(+), 71 deletions(-)

diff --git a/examples/qos_sched/cfg_file.c b/examples/qos_sched/cfg_file.c
index ca871d3287..c75cf9db2e 100644
--- a/examples/qos_sched/cfg_file.c
+++ b/examples/qos_sched/cfg_file.c
@@ -25,6 +25,21 @@ uint32_t n_active_queues;
 
 struct rte_sched_cman_params cman_params;
 
+int parse_u64(const char *entry, uint64_t *val)
+{
+	char *endptr;
+	if (!entry || !val)
+		return -EINVAL;
+
+	errno = 0;
+
+	*val = strtoull(entry, &endptr, 0);
+	if (errno == EINVAL || errno == ERANGE || *endptr != '\0')
+		return -EINVAL;
+
+	return 0;
+}
+
 int
 cfg_load_port(struct rte_cfgfile *cfg, struct rte_sched_port_params *port_params)
 {
@@ -47,7 +62,7 @@ cfg_load_port(struct rte_cfgfile *cfg, struct rte_sched_port_params *port_params
 int
 cfg_load_pipe(struct rte_cfgfile *cfg, struct rte_sched_pipe_params *pipe_params)
 {
-	int i, j;
+	int i, j, ret = 0;
 	char *next;
 	const char *entry;
 	int profiles;
@@ -63,68 +78,84 @@ cfg_load_pipe(struct rte_cfgfile *cfg, struct rte_sched_pipe_params *pipe_params
 		snprintf(pipe_name, sizeof(pipe_name), "pipe profile %d", j);
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tb rate");
-		if (entry)
-			pipe_params[j].tb_rate = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tb_rate);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tb size");
-		if (entry)
-			pipe_params[j].tb_size = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tb_size);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc period");
-		if (entry)
-			pipe_params[j].tc_period = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_period);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 0 rate");
-		if (entry)
-			pipe_params[j].tc_rate[0] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[0]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 1 rate");
-		if (entry)
-			pipe_params[j].tc_rate[1] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[1]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 2 rate");
-		if (entry)
-			pipe_params[j].tc_rate[2] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[2]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 3 rate");
-		if (entry)
-			pipe_params[j].tc_rate[3] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[3]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 4 rate");
-		if (entry)
-			pipe_params[j].tc_rate[4] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[4]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 5 rate");
-		if (entry)
-			pipe_params[j].tc_rate[5] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[5]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 6 rate");
-		if (entry)
-			pipe_params[j].tc_rate[6] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[6]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 7 rate");
-		if (entry)
-			pipe_params[j].tc_rate[7] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[7]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 8 rate");
-		if (entry)
-			pipe_params[j].tc_rate[8] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[8]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 9 rate");
-		if (entry)
-			pipe_params[j].tc_rate[9] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[9]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 10 rate");
-		if (entry)
-			pipe_params[j].tc_rate[10] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[10]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 11 rate");
-		if (entry)
-			pipe_params[j].tc_rate[11] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[11]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 12 rate");
-		if (entry)
-			pipe_params[j].tc_rate[12] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &pipe_params[j].tc_rate[12]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 12 oversubscription weight");
 		if (entry)
@@ -148,7 +179,7 @@ int
 cfg_load_subport_profile(struct rte_cfgfile *cfg,
 	struct rte_sched_subport_profile_params *subport_profile)
 {
-	int i;
+	int i, ret = 0;
 	const char *entry;
 	int profiles;
 
@@ -164,68 +195,84 @@ cfg_load_subport_profile(struct rte_cfgfile *cfg,
 		snprintf(sec_name, sizeof(sec_name), "subport profile %d", i);
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tb rate");
-		if (entry)
-			subport_profile[i].tb_rate = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tb_rate);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tb size");
-		if (entry)
-			subport_profile[i].tb_size = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tb_size);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc period");
-		if (entry)
-			subport_profile[i].tc_period = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_period);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 0 rate");
-		if (entry)
-			subport_profile[i].tc_rate[0] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[0]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 1 rate");
-		if (entry)
-			subport_profile[i].tc_rate[1] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[1]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 2 rate");
-		if (entry)
-			subport_profile[i].tc_rate[2] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[2]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 3 rate");
-		if (entry)
-			subport_profile[i].tc_rate[3] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[3]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 4 rate");
-		if (entry)
-			subport_profile[i].tc_rate[4] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[4]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 5 rate");
-		if (entry)
-			subport_profile[i].tc_rate[5] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[5]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 6 rate");
-		if (entry)
-			subport_profile[i].tc_rate[6] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[6]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 7 rate");
-		if (entry)
-			subport_profile[i].tc_rate[7] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[7]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 8 rate");
-		if (entry)
-			subport_profile[i].tc_rate[8] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[8]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 9 rate");
-		if (entry)
-			subport_profile[i].tc_rate[9] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[9]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 10 rate");
-		if (entry)
-			subport_profile[i].tc_rate[10] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[10]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 11 rate");
-		if (entry)
-			subport_profile[i].tc_rate[11] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[11]);
+		if (ret)
+			return ret;
 
 		entry = rte_cfgfile_get_entry(cfg, sec_name, "tc 12 rate");
-		if (entry)
-			subport_profile[i].tc_rate[12] = (uint64_t)atoi(entry);
+		ret = parse_u64(entry, &subport_profile[i].tc_rate[12]);
+		if (ret)
+			return ret;
 	}
 
 	return 0;
diff --git a/examples/qos_sched/cfg_file.h b/examples/qos_sched/cfg_file.h
index 0dc458aa71..71d280718f 100644
--- a/examples/qos_sched/cfg_file.h
+++ b/examples/qos_sched/cfg_file.h
@@ -8,6 +8,8 @@
 #include <rte_sched.h>
 #include <rte_cfgfile.h>
 
+int parse_u64(const char *entry, uint64_t *val);
+
 int cfg_load_port(struct rte_cfgfile *cfg, struct rte_sched_port_params *port);
 
 int cfg_load_pipe(struct rte_cfgfile *cfg, struct rte_sched_pipe_params *pipe);
diff --git a/examples/qos_sched/init.c b/examples/qos_sched/init.c
index d897fd378b..0709aec10c 100644
--- a/examples/qos_sched/init.c
+++ b/examples/qos_sched/init.c
@@ -280,20 +280,33 @@ app_init_sched_port(uint32_t portid, uint32_t socketid)
 static int
 app_load_cfg_profile(const char *profile)
 {
+	int ret  = 0;
 	if (profile == NULL)
 		return 0;
 	struct rte_cfgfile *file = rte_cfgfile_load(profile, 0);
 	if (file == NULL)
 		rte_exit(EXIT_FAILURE, "Cannot load configuration profile %s\n", profile);
 
-	cfg_load_port(file, &port_params);
-	cfg_load_subport(file, subport_params);
-	cfg_load_subport_profile(file, subport_profile);
-	cfg_load_pipe(file, pipe_profiles);
+	ret = cfg_load_port(file, &port_params);
+	if (ret)
+		goto _app_load_cfg_profile_error_return;
 
+	ret = cfg_load_subport(file, subport_params);
+	if (ret)
+		goto _app_load_cfg_profile_error_return;
+
+	ret = cfg_load_subport_profile(file, subport_profile);
+	if (ret)
+		goto _app_load_cfg_profile_error_return;
+
+	ret = cfg_load_pipe(file, pipe_profiles);
+	if (ret)
+		goto _app_load_cfg_profile_error_return;
+
+_app_load_cfg_profile_error_return:
 	rte_cfgfile_close(file);
 
-	return 0;
+	return ret;
 }
 
 int app_init(void)
-- 
2.25.1


  parent reply	other threads:[~2022-10-28  9:59 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-05 17:22 [PATCH v2] sched: Fix subport profile id not set correctly Megha Ajmera
2022-10-05 19:19 ` Dumitrescu, Cristian
2022-10-11  4:59   ` Ajmera, Megha
2022-10-06 19:00 ` [PATCH 1/3] sched: fix " Megha Ajmera
2022-10-06 19:00   ` [PATCH 2/3] sched: removed unused subport field in hqos profile Megha Ajmera
2022-10-11 14:26     ` Dumitrescu, Cristian
2022-10-06 19:00   ` [PATCH 3/3] sched: support for 100G+ rates in subport/pipe config Megha Ajmera
2022-10-11 13:09     ` Dumitrescu, Cristian
2022-10-18  5:40       ` Ajmera, Megha
2022-10-18 13:12         ` Dumitrescu, Cristian
2022-10-19 18:37           ` Stephen Hemminger
2022-10-20  9:47             ` [PATCH v4 1/3] sched: fix subport profile ID Megha Ajmera
2022-10-20  9:47               ` [PATCH v4 2/3] sched: fix number of subport profiles Megha Ajmera
2022-10-20  9:47               ` [PATCH v4 3/3] sched: support for 100G+ rates in subport/pipe config Megha Ajmera
2022-10-24 18:57                 ` Dumitrescu, Cristian
2022-10-20  9:55             ` [PATCH " Ajmera, Megha
2022-10-11 14:22   ` [PATCH 1/3] sched: fix subport profile id not set correctly Dumitrescu, Cristian
2022-10-28  8:09   ` [PATCH v5 1/3] sched: fix subport profile ID Megha Ajmera
2022-10-28  8:09     ` [PATCH v5 2/3] sched: fix number of subport profiles Megha Ajmera
2022-10-28  8:09     ` [PATCH v5 3/3] sched: support for 100G+ rates in subport/pipe config Megha Ajmera
2022-10-28  9:55   ` [PATCH v6 1/3] sched: fix subport profile ID Megha Ajmera
2022-10-28  9:55     ` [PATCH v6 2/3] sched: fix number of subport profiles Megha Ajmera
2022-10-28 14:02       ` David Marchand
2022-10-28  9:55     ` Megha Ajmera [this message]
2022-10-28 10:57       ` [PATCH v6 3/3] sched: support for 100G+ rates in subport/pipe config Dumitrescu, Cristian
2022-10-28 14:04         ` David Marchand
2022-10-28 14:01     ` [PATCH v6 1/3] sched: fix subport profile ID David Marchand

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