From: Wenjing Qiao <wenjing.qiao@intel.com>
To: jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com
Cc: dev@dpdk.org, Wenjing Qiao <wenjing.qiao@intel.com>,
stable@dpdk.org, Simei Su <simei.su@intel.com>
Subject: [PATCH 17/18] common/idpf: fix cannot understand warnings
Date: Thu, 13 Apr 2023 05:45:01 -0400 [thread overview]
Message-ID: <20230413094502.1714755-18-wenjing.qiao@intel.com> (raw)
In-Reply-To: <20230413094502.1714755-1-wenjing.qiao@intel.com>
Fix cannot understand function prototype warning, it is due to missing
"struct" keyword and not described parameter or member in comments.
Fixes: fb4ac04e9bfa ("common/idpf: introduce common library")
Cc: stable@dpdk.org
Signed-off-by: Simei Su <simei.su@intel.com>
Signed-off-by: Wenjing Qiao <wenjing.qiao@intel.com>
---
drivers/common/idpf/base/virtchnl.h | 28 +++++++++++++++-------------
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/common/idpf/base/virtchnl.h b/drivers/common/idpf/base/virtchnl.h
index 4e9cf9fdeb..a333a3d88c 100644
--- a/drivers/common/idpf/base/virtchnl.h
+++ b/drivers/common/idpf/base/virtchnl.h
@@ -2149,7 +2149,7 @@ VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_quanta_cfg);
#define VIRTCHNL_1588_PTP_CAP_GNSS BIT(7)
/**
- * virtchnl_phc_regs
+ * struct virtchnl_phc_regs
*
* Structure defines how the VF should access PHC related registers. The VF
* must request VIRTCHNL_1588_PTP_CAP_PHC_REGS. If the VF has access to PHC
@@ -2211,7 +2211,7 @@ enum virtchnl_ptp_tstamp_format {
};
/**
- * virtchnl_ptp_caps
+ * struct virtchnl_ptp_caps
*
* Structure that defines the PTP capabilities available to the VF. The VF
* sends VIRTCHNL_OP_1588_PTP_GET_CAPS, and must fill in the ptp_caps field
@@ -2313,7 +2313,7 @@ struct virtchnl_ptp_caps {
VIRTCHNL_CHECK_STRUCT_LEN(48, virtchnl_ptp_caps);
/**
- * virtchnl_phc_time
+ * struct virtchnl_phc_time
* @time: PHC time in nanoseconds
* @rsvd: Reserved for future extension
*
@@ -2339,7 +2339,7 @@ struct virtchnl_phc_time {
VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_time);
/**
- * virtchnl_phc_adj_time
+ * struct virtchnl_phc_adj_time
* @delta: offset requested to adjust clock by
* @rsvd: reserved for future extension
*
@@ -2359,7 +2359,7 @@ struct virtchnl_phc_adj_time {
VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_adj_time);
/**
- * virtchnl_phc_adj_freq
+ * struct virtchnl_phc_adj_freq
* @scaled_ppm: frequency adjustment represented in scaled parts per million
* @rsvd: Reserved for future extension
*
@@ -2388,7 +2388,7 @@ struct virtchnl_phc_adj_freq {
VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_adj_freq);
/**
- * virtchnl_phc_tx_stamp
+ * struct virtchnl_phc_tx_stamp
* @tstamp: timestamp value
* @rsvd: Reserved for future extension
*
@@ -2435,7 +2435,7 @@ enum virtchnl_phc_ext_ts_mode {
};
/**
- * virtchnl_phc_ext_ts
+ * struct virtchnl_phc_ext_ts
* @mode: mode of external timestamp request
* @rsvd: reserved for future extension
*
@@ -2473,13 +2473,13 @@ enum virtchnl_phc_per_out_flags {
};
/**
- * virtchnl_phc_per_out
+ * struct virtchnl_phc_per_out
* @start: absolute start time (if VIRTCHNL_PHC_PER_OUT_PHASE_START unset)
* @phase: phase offset to start (if VIRTCHNL_PHC_PER_OUT_PHASE_START set)
* @period: time to complete a full clock cycle (low - > high -> low)
* @on: length of time the signal should stay high
* @flags: flags defining the periodic output operation.
- * rsvd: reserved for future extension
+ * @rsvd: reserved for future extension
*
* Configuration for a periodic output signal. Used to define the signal that
* should be generated on a given function.
@@ -2547,7 +2547,8 @@ enum virtchnl_phc_pin_cfg_flags {
};
/**
- * virtchnl_phc_set_pin
+ * struct virtchnl_phc_set_pin
+ * @flags: flags defining the bits to cfg pin
* @pin_index: The pin to get or set
* @func: the function type the pin is assigned to
* @func_index: the index of the function the pin is assigned to
@@ -2591,7 +2592,7 @@ struct virtchnl_phc_set_pin {
VIRTCHNL_CHECK_STRUCT_LEN(80, virtchnl_phc_set_pin);
/**
- * virtchnl_phc_pin
+ * struct virtchnl_phc_pin
* @pin_index: The pin to get or set
* @func: the function type the pin is assigned to
* @func_index: the index of the function the pin is assigned to
@@ -2618,9 +2619,10 @@ struct virtchnl_phc_pin {
VIRTCHNL_CHECK_STRUCT_LEN(72, virtchnl_phc_pin);
/**
- * virtchnl_phc_pin_cfg
+ * struct virtchnl_phc_get_pins
* @len: length of the variable pin config array
* @pins: variable length pin configuration array
+ * @rsvd: reserved for future extension
*
* Variable structure sent by the PF in reply to
* VIRTCHNL_OP_1588_PTP_GET_PIN_CFGS. The VF does not send this structure with
@@ -2642,7 +2644,7 @@ struct virtchnl_phc_get_pins {
VIRTCHNL_CHECK_STRUCT_LEN(80, virtchnl_phc_get_pins);
/**
- * virtchnl_phc_ext_stamp
+ * struct virtchnl_phc_ext_stamp
* @tstamp: timestamp value
* @tstamp_rsvd: Reserved for future extension of the timestamp value.
* @tstamp_format: format of the timstamp
--
2.25.1
prev parent reply other threads:[~2023-04-13 9:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20230413094502.1714755-1-wenjing.qiao@intel.com>
2023-04-13 9:44 ` [PATCH 02/18] common/idpf: fix ctlq message send and receive Wenjing Qiao
2023-04-13 9:44 ` [PATCH 03/18] common/idpf: fix ITR register definitions for AVF Wenjing Qiao
2023-04-13 9:44 ` [PATCH 09/18] common/idpf: fix idpf_send_msg_to_cp prototypes Wenjing Qiao
2023-04-13 9:44 ` [PATCH 10/18] common/idpf: fix memory leaks on ctrlq functions Wenjing Qiao
2023-04-13 9:45 ` Wenjing Qiao [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230413094502.1714755-18-wenjing.qiao@intel.com \
--to=wenjing.qiao@intel.com \
--cc=beilei.xing@intel.com \
--cc=dev@dpdk.org \
--cc=jingjing.wu@intel.com \
--cc=qi.z.zhang@intel.com \
--cc=simei.su@intel.com \
--cc=stable@dpdk.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).