From: Simei Su <simei.su@intel.com>
To: jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com
Cc: dev@dpdk.org, wenjun1.wu@intel.com, mingxia.liu@intel.com,
wenjing.qiao@intel.com, Simei Su <simei.su@intel.com>,
Milena Olech <milena.olech@intel.com>
Subject: [PATCH v5 04/11] common/idpf/base: initialize PTP support
Date: Wed, 20 Sep 2023 14:22:29 +0800 [thread overview]
Message-ID: <20230920062236.375308-5-simei.su@intel.com> (raw)
In-Reply-To: <20230920062236.375308-1-simei.su@intel.com>
Add a few PTP capabilities to determine which PTP features are
enabled including legacy cross time, ptm, device clock control,
PTP Tx timestamp with direct registers access and PTP Tx timestamp
with virtchnl messages. Also create opcodes and structures to
support feautres introduced by capabilities.
Signed-off-by: Milena Olech <milena.olech@intel.com>
Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
---
drivers/common/idpf/base/virtchnl2.h | 145 +++++++++++++++++++++++++++
1 file changed, 145 insertions(+)
diff --git a/drivers/common/idpf/base/virtchnl2.h b/drivers/common/idpf/base/virtchnl2.h
index c49e4b943c..320430df6f 100644
--- a/drivers/common/idpf/base/virtchnl2.h
+++ b/drivers/common/idpf/base/virtchnl2.h
@@ -98,6 +98,9 @@
#define VIRTCHNL2_OP_ADD_QUEUE_GROUPS 538
#define VIRTCHNL2_OP_DEL_QUEUE_GROUPS 539
#define VIRTCHNL2_OP_GET_PORT_STATS 540
+ /* TimeSync opcodes */
+#define VIRTCHNL2_OP_GET_PTP_CAPS 541
+#define VIRTCHNL2_OP_GET_PTP_TX_TSTAMP_LATCHES 542
#define VIRTCHNL2_RDMA_INVALID_QUEUE_IDX 0xFFFF
@@ -1395,6 +1398,112 @@ struct virtchnl2_promisc_info {
VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_promisc_info);
+/* VIRTCHNL2_PTP_CAPS
+ * PTP capabilities
+ */
+#define VIRTCHNL2_PTP_CAP_LEGACY_CROSS_TIME BIT(0)
+#define VIRTCHNL2_PTP_CAP_PTM BIT(1)
+#define VIRTCHNL2_PTP_CAP_DEVICE_CLOCK_CONTROL BIT(2)
+#define VIRTCHNL2_PTP_CAP_TX_TSTAMPS_DIRECT BIT(3)
+#define VIRTCHNL2_PTP_CAP_TX_TSTAMPS_VIRTCHNL BIT(4)
+
+/* Legacy cross time registers offsets */
+struct virtchnl2_ptp_legacy_cross_time_reg {
+ __le32 shadow_time_0;
+ __le32 shadow_time_l;
+ __le32 shadow_time_h;
+ __le32 cmd_sync;
+};
+
+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_ptp_legacy_cross_time_reg);
+
+/* PTM cross time registers offsets */
+struct virtchnl2_ptp_ptm_cross_time_reg {
+ __le32 art_l;
+ __le32 art_h;
+ __le32 cmd_sync;
+ u8 pad[4];
+};
+
+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_ptp_ptm_cross_time_reg);
+
+/* Registers needed to control the main clock */
+struct virtchnl2_ptp_device_clock_control {
+ __le32 cmd;
+ __le32 incval_l;
+ __le32 incval_h;
+ __le32 shadj_l;
+ __le32 shadj_h;
+ u8 pad[4];
+};
+
+VIRTCHNL2_CHECK_STRUCT_LEN(24, virtchnl2_ptp_device_clock_control);
+
+/* Structure that defines tx tstamp entry - index and register offset */
+struct virtchnl2_ptp_tx_tstamp_entry {
+ __le32 tx_latch_register_base;
+ __le32 tx_latch_register_offset;
+ u8 index;
+ u8 pad[7];
+};
+
+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_ptp_tx_tstamp_entry);
+
+/* Structure that defines tx tstamp entries - total number of latches
+ * and the array of entries.
+ */
+struct virtchnl2_ptp_tx_tstamp {
+ __le16 num_latches;
+ /* latch size expressed in bits */
+ __le16 latch_size;
+ u8 pad[4];
+ struct virtchnl2_ptp_tx_tstamp_entry ptp_tx_tstamp_entries[1];
+};
+
+VIRTCHNL2_CHECK_STRUCT_LEN(24, virtchnl2_ptp_tx_tstamp);
+
+/* VIRTCHNL2_OP_GET_PTP_CAPS
+ * PV/VF sends this message to negotiate PTP capabilities. CP updates bitmap
+ * with supported features and fulfills appropriate structures.
+ */
+struct virtchnl2_get_ptp_caps {
+ /* PTP capability bitmap */
+ /* see VIRTCHNL2_PTP_CAPS definitions */
+ __le32 ptp_caps;
+ u8 pad[4];
+
+ struct virtchnl2_ptp_legacy_cross_time_reg legacy_cross_time_reg;
+ struct virtchnl2_ptp_ptm_cross_time_reg ptm_cross_time_reg;
+ struct virtchnl2_ptp_device_clock_control device_clock_control;
+ struct virtchnl2_ptp_tx_tstamp tx_tstamp;
+};
+
+VIRTCHNL2_CHECK_STRUCT_LEN(88, virtchnl2_get_ptp_caps);
+
+/* Structure that describes tx tstamp values, index and validity */
+struct virtchnl2_ptp_tx_tstamp_latch {
+ __le32 tstamp_h;
+ __le32 tstamp_l;
+ u8 index;
+ u8 valid;
+ u8 pad[6];
+};
+
+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_ptp_tx_tstamp_latch);
+
+/* VIRTCHNL2_OP_GET_PTP_TX_TSTAMP_LATCHES
+ * PF/VF sends this message to receive a specified number of timestamps
+ * entries.
+ */
+struct virtchnl2_ptp_tx_tstamp_latches {
+ __le16 num_latches;
+ /* latch size expressed in bits */
+ __le16 latch_size;
+ u8 pad[4];
+ struct virtchnl2_ptp_tx_tstamp_latch tstamp_latches[1];
+};
+
+VIRTCHNL2_CHECK_STRUCT_LEN(24, virtchnl2_ptp_tx_tstamp_latches);
static inline const char *virtchnl2_op_str(__le32 v_opcode)
{
@@ -1463,6 +1572,10 @@ static inline const char *virtchnl2_op_str(__le32 v_opcode)
return "VIRTCHNL2_OP_DEL_QUEUE_GROUPS";
case VIRTCHNL2_OP_GET_PORT_STATS:
return "VIRTCHNL2_OP_GET_PORT_STATS";
+ case VIRTCHNL2_OP_GET_PTP_CAPS:
+ return "VIRTCHNL2_OP_GET_PTP_CAPS";
+ case VIRTCHNL2_OP_GET_PTP_TX_TSTAMP_LATCHES:
+ return "VIRTCHNL2_OP_GET_PTP_TX_TSTAMP_LATCHES";
default:
return "Unsupported (update virtchnl2.h)";
}
@@ -1732,6 +1845,38 @@ virtchnl2_vc_validate_vf_msg(__rte_unused struct virtchnl2_version_info *ver, u3
break;
case VIRTCHNL2_OP_RESET_VF:
break;
+ case VIRTCHNL2_OP_GET_PTP_CAPS:
+ valid_len = sizeof(struct virtchnl2_get_ptp_caps);
+
+ if (msglen >= valid_len) {
+ struct virtchnl2_get_ptp_caps *ptp_caps =
+ (struct virtchnl2_get_ptp_caps *)msg;
+
+ if (ptp_caps->tx_tstamp.num_latches == 0) {
+ err_msg_format = true;
+ break;
+ }
+
+ valid_len += ((ptp_caps->tx_tstamp.num_latches - 1) *
+ sizeof(struct virtchnl2_ptp_tx_tstamp_entry));
+ }
+ break;
+ case VIRTCHNL2_OP_GET_PTP_TX_TSTAMP_LATCHES:
+ valid_len = sizeof(struct virtchnl2_ptp_tx_tstamp_latches);
+
+ if (msglen >= valid_len) {
+ struct virtchnl2_ptp_tx_tstamp_latches *tx_tstamp_latches =
+ (struct virtchnl2_ptp_tx_tstamp_latches *)msg;
+
+ if (tx_tstamp_latches->num_latches == 0) {
+ err_msg_format = true;
+ break;
+ }
+
+ valid_len += ((tx_tstamp_latches->num_latches - 1) *
+ sizeof(struct virtchnl2_ptp_tx_tstamp_latch));
+ }
+ break;
/* These are always errors coming from the VF. */
case VIRTCHNL2_OP_EVENT:
case VIRTCHNL2_OP_UNKNOWN:
--
2.25.1
next prev parent reply other threads:[~2023-09-20 6:22 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-09 1:32 [PATCH 00/14] update idpf base code Wenjing Qiao
2023-08-09 1:32 ` [PATCH 01/14] common/idpf/base: enable support for physical port stats Wenjing Qiao
2023-08-09 1:32 ` [PATCH 02/14] common/idpf/base: add miss completion capabilities Wenjing Qiao
2023-08-09 1:32 ` [PATCH 03/14] common/idpf/base: initial PTP support Wenjing Qiao
2023-08-09 2:22 ` Liu, Mingxia
2023-08-09 1:32 ` [PATCH 04/14] common/idpf/base: remove mailbox registers Wenjing Qiao
2023-08-09 1:32 ` [PATCH 05/14] common/idpf/base: add some adi specific fields Wenjing Qiao
2023-08-09 1:33 ` [PATCH 06/14] common/idpf/base: add necessary check Wenjing Qiao
2023-08-09 1:33 ` [PATCH 07/14] common/idpf/base: add union for SW cookie fields in ctlq msg Wenjing Qiao
2023-08-09 1:33 ` [PATCH 08/14] common/idpf/base: define non-flexible size structure for ADI Wenjing Qiao
2023-08-09 1:33 ` [PATCH 09/14] common/idpf/base: use local pointer before updating 'CQ out' Wenjing Qiao
2023-08-09 1:33 ` [PATCH 10/14] common/idpf/base: use 'void' return type Wenjing Qiao
2023-08-09 1:33 ` [PATCH 11/14] common/idpf/base: refactor descriptor 'ret val' stripping Wenjing Qiao
2023-08-09 1:33 ` [PATCH 12/14] common/idpf/base: refine comments and alignment Wenjing Qiao
2023-08-09 1:33 ` [PATCH 13/14] common/idpf/base: use GENMASK macro Wenjing Qiao
2023-08-09 1:33 ` [PATCH 14/14] common/idpf/base: use 'type functionname(args)' style Wenjing Qiao
2023-08-25 10:13 ` [PATCH v2 00/17] update idpf base code Simei Su
2023-08-25 10:13 ` [PATCH v2 01/17] common/idpf/base: enable support for physical port stats Simei Su
2023-08-25 10:13 ` [PATCH v2 02/17] common/idpf/base: add miss completion capabilities Simei Su
2023-08-25 10:13 ` [PATCH v2 03/17] common/idpf/base: initial PTP support Simei Su
2023-08-25 10:13 ` [PATCH v2 04/17] common/idpf/base: remove mailbox registers Simei Su
2023-08-25 10:13 ` [PATCH v2 05/17] common/idpf/base: add some adi specific fields Simei Su
2023-08-25 10:13 ` [PATCH v2 06/17] common/idpf/base: add necessary check Simei Su
2023-08-25 10:13 ` [PATCH v2 07/17] common/idpf/base: add union for SW cookie fields in ctlq msg Simei Su
2023-08-25 10:13 ` [PATCH v2 08/17] common/idpf/base: define non-flexible size structure for ADI Simei Su
2023-08-25 10:13 ` [PATCH v2 09/17] common/idpf/base: use local pointer before updating 'CQ out' Simei Su
2023-08-25 10:13 ` [PATCH v2 10/17] common/idpf/base: use 'void' return type Simei Su
2023-08-25 10:13 ` [PATCH v2 11/17] common/idpf/base: refactor descriptor 'ret val' stripping Simei Su
2023-08-25 10:13 ` [PATCH v2 12/17] common/idpf/base: refine comments and alignment Simei Su
2023-08-25 10:13 ` [PATCH v2 13/17] common/idpf/base: use GENMASK macro Simei Su
2023-08-25 10:13 ` [PATCH v2 14/17] common/idpf/base: use 'type functionname(args)' style Simei Su
2023-08-25 10:13 ` [PATCH v2 15/17] common/idpf/base: dont declare union with 'flex' Simei Su
2023-08-25 10:13 ` [PATCH v2 16/17] common/idpf/base: remove unused Tx descriptor types Simei Su
2023-08-25 10:13 ` [PATCH v2 17/17] common/idpf/base: update version Simei Su
2023-09-15 2:17 ` [PATCH v3 00/17] update idpf base code Simei Su
2023-09-15 2:17 ` [PATCH v3 01/17] common/idpf/base: enable support for physical port stats Simei Su
2023-09-15 2:17 ` [PATCH v3 02/17] common/idpf/base: add miss completion capabilities Simei Su
2023-09-15 2:17 ` [PATCH v3 03/17] common/idpf/base: initial PTP support Simei Su
2023-09-15 2:17 ` [PATCH v3 04/17] common/idpf/base: remove mailbox registers Simei Su
2023-09-15 2:17 ` [PATCH v3 05/17] common/idpf/base: add some adi specific fields Simei Su
2023-09-15 2:17 ` [PATCH v3 06/17] common/idpf/base: add necessary check Simei Su
2023-09-15 2:17 ` [PATCH v3 07/17] common/idpf/base: add union for SW cookie fields in ctlq msg Simei Su
2023-09-15 2:17 ` [PATCH v3 08/17] common/idpf/base: define non-flexible size structure for ADI Simei Su
2023-09-15 2:17 ` [PATCH v3 09/17] common/idpf/base: use local pointer before updating 'CQ out' Simei Su
2023-09-15 2:17 ` [PATCH v3 10/17] common/idpf/base: use 'void' return type Simei Su
2023-09-15 2:17 ` [PATCH v3 11/17] common/idpf/base: refactor descriptor 'ret val' stripping Simei Su
2023-09-15 2:17 ` [PATCH v3 12/17] common/idpf/base: refine comments and alignment Simei Su
2023-09-15 2:17 ` [PATCH v3 13/17] common/idpf/base: use GENMASK macro Simei Su
2023-09-15 2:17 ` [PATCH v3 14/17] common/idpf/base: use 'type functionname(args)' style Simei Su
2023-09-15 2:17 ` [PATCH v3 15/17] common/idpf/base: don't declare union with 'flex' Simei Su
2023-09-15 2:17 ` [PATCH v3 16/17] common/idpf/base: remove unused Tx descriptor types Simei Su
2023-09-15 2:17 ` [PATCH v3 17/17] common/idpf/base: update version Simei Su
2023-09-15 5:44 ` [PATCH v3 00/17] update idpf base code Xing, Beilei
2023-09-18 2:11 ` [PATCH v4 00/18] " Simei Su
2023-09-18 2:11 ` [PATCH v4 01/18] common/idpf: refactor single queue Tx data path Simei Su
2023-09-18 2:11 ` [PATCH v4 02/18] common/idpf/base: enable support for physical port stats Simei Su
2023-09-18 2:11 ` [PATCH v4 03/18] common/idpf/base: add miss completion capabilities Simei Su
2023-09-18 2:11 ` [PATCH v4 04/18] common/idpf/base: initial PTP support Simei Su
2023-09-18 2:11 ` [PATCH v4 05/18] common/idpf/base: remove mailbox registers Simei Su
2023-09-18 2:11 ` [PATCH v4 06/18] common/idpf/base: add some adi specific fields Simei Su
2023-09-18 2:11 ` [PATCH v4 07/18] common/idpf/base: add necessary check Simei Su
2023-09-18 2:11 ` [PATCH v4 08/18] common/idpf/base: add union for SW cookie fields in ctlq msg Simei Su
2023-09-18 2:11 ` [PATCH v4 09/18] common/idpf/base: define non-flexible size structure for ADI Simei Su
2023-09-18 2:11 ` [PATCH v4 10/18] common/idpf/base: use local pointer before updating 'CQ out' Simei Su
2023-09-18 2:11 ` [PATCH v4 11/18] common/idpf/base: use 'void' return type Simei Su
2023-09-18 2:11 ` [PATCH v4 12/18] common/idpf/base: refactor descriptor 'ret val' stripping Simei Su
2023-09-18 2:11 ` [PATCH v4 13/18] common/idpf/base: refine comments and alignment Simei Su
2023-09-18 2:11 ` [PATCH v4 14/18] common/idpf/base: use GENMASK macro Simei Su
2023-09-18 2:11 ` [PATCH v4 15/18] common/idpf/base: use 'type functionname(args)' style Simei Su
2023-09-18 2:11 ` [PATCH v4 16/18] common/idpf/base: don't declare union with 'flex' Simei Su
2023-09-18 2:11 ` [PATCH v4 17/18] common/idpf/base: remove unused Tx descriptor types Simei Su
2023-09-18 2:11 ` [PATCH v4 18/18] common/idpf/base: update version Simei Su
2023-09-20 6:22 ` [PATCH v5 00/11] update idpf base code Simei Su
2023-09-20 6:22 ` [PATCH v5 01/11] common/idpf: refactor single queue Tx data path Simei Su
2023-09-20 6:22 ` [PATCH v5 02/11] common/idpf/base: enable support for physical port stats Simei Su
2023-09-20 6:22 ` [PATCH v5 03/11] common/idpf/base: add miss completion capabilities Simei Su
2023-09-20 6:22 ` Simei Su [this message]
2023-09-20 6:22 ` [PATCH v5 05/11] common/idpf/base: remove mailbox registers Simei Su
2023-09-20 6:22 ` [PATCH v5 06/11] common/idpf/base: refine structure and necessary check Simei Su
2023-09-20 6:22 ` [PATCH v5 07/11] common/idpf/base: add union for SW cookie fields Simei Su
2023-09-20 6:22 ` [PATCH v5 08/11] common/idpf/base: refine code and alignments Simei Su
2023-09-20 6:22 ` [PATCH v5 09/11] common/idpf/base: use GENMASK macro Simei Su
2023-09-20 6:22 ` [PATCH v5 10/11] common/idpf/base: remove unused Tx descriptor types Simei Su
2023-09-20 6:22 ` [PATCH v5 11/11] common/idpf/base: update version Simei Su
2023-09-21 1:21 ` [PATCH v5 00/11] update idpf base code Zhang, Qi Z
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