From: Gregory Etelson <getelson@nvidia.com>
To: <dev@dpdk.org>
Cc: <getelson@nvidia.com>, <mkashani@nvidia.com>,
<rasland@nvidia.com>, "Ori Kam" <orika@nvidia.com>,
Matan Azrad <matan@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Suanming Mou <suanmingm@nvidia.com>
Subject: [PATCH 02/13] net/mlx5: add flow_hw_get_reg_id_from_ctx()
Date: Sun, 29 Oct 2023 20:22:49 +0200 [thread overview]
Message-ID: <20231029182300.227879-3-getelson@nvidia.com> (raw)
In-Reply-To: <20231029182300.227879-1-getelson@nvidia.com>
The new function call `flow_hw_get_reg_id_from_ctx()` maps input
DR5 context and register type to REG_C register.
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
---
drivers/net/mlx5/mlx5_flow.h | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 1fec295476..de31ab56bc 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1714,6 +1714,28 @@ flow_hw_get_reg_id(enum rte_flow_item_type type, uint32_t id)
}
}
+static __rte_always_inline int
+flow_hw_get_reg_id_from_ctx(void *dr_ctx,
+ enum rte_flow_item_type type, uint32_t id)
+{
+#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+ uint16_t port;
+
+ MLX5_ETH_FOREACH_DEV(port, NULL) {
+ struct mlx5_priv *priv;
+
+ priv = rte_eth_devices[port].data->dev_private;
+ if (priv->dr_ctx == dr_ctx)
+ return flow_hw_get_reg_id(type, id);
+ }
+#else
+ RTE_SET_USED(dr_ctx);
+ RTE_SET_USED(type);
+ RTE_SET_USED(id);
+#endif
+ return REG_NON;
+}
+
void flow_hw_set_port_info(struct rte_eth_dev *dev);
void flow_hw_clear_port_info(struct rte_eth_dev *dev);
--
2.39.2
next prev parent reply other threads:[~2023-10-29 18:23 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-29 18:22 [PATCH 00/13] net/mlx5: support more REG C registers Gregory Etelson
2023-10-29 18:22 ` [PATCH 01/13] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data Gregory Etelson
2023-10-29 18:22 ` Gregory Etelson [this message]
2023-10-29 18:22 ` [PATCH 03/13] net/mlx5/hws: Definer, use flow_hw_get_reg_id_from_ctx function call Gregory Etelson
2023-10-29 18:22 ` [PATCH 04/13] net/mlx5: add rte_device parameter to locate HWS registers Gregory Etelson
2023-10-29 18:22 ` [PATCH 05/13] net/mlx5: separate port REG_C registers usage Gregory Etelson
2023-10-29 18:22 ` [PATCH 06/13] net/mlx5: merge REG_C aliases Gregory Etelson
2023-10-29 18:22 ` [PATCH 07/13] net/mlx5: initialize HWS flow tags registers in shared dev context Gregory Etelson
2023-10-29 18:22 ` [PATCH 08/13] net/mlx5/hws: adding method to query rule hash Gregory Etelson
2023-10-30 6:23 ` Ori Kam
2023-10-29 18:22 ` [PATCH 09/13] net/mlx5: add support for calc hash Gregory Etelson
2023-10-30 8:23 ` Dariusz Sosnowski
2023-10-29 18:22 ` [PATCH 10/13] net/mlx5: fix insert by index Gregory Etelson
2023-10-30 8:25 ` Dariusz Sosnowski
2023-10-29 18:22 ` [PATCH 11/13] net/mlx5: fix query for NIC flow cap Gregory Etelson
2023-10-30 8:26 ` Dariusz Sosnowski
2023-10-29 18:22 ` [PATCH 12/13] net/mlx5: add support for more registers Gregory Etelson
2023-10-30 8:27 ` Dariusz Sosnowski
2023-10-29 18:23 ` [PATCH 13/13] net/mlx5: add validation support for tags Gregory Etelson
2023-10-30 8:28 ` Dariusz Sosnowski
2023-10-30 8:37 ` [PATCH 00/13] net/mlx5: support more REG C registers Suanming Mou
2023-10-30 17:11 ` Raslan Darawsheh
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