From: Itamar Gozlan <igozlan@nvidia.com>
To: <igozlan@nvidia.com>, <erezsh@nvidia.com>, <hamdani@nvidia.com>,
<kliteyn@nvidia.com>, <viacheslavo@nvidia.com>,
<thomas@monjalon.net>, <suanmingm@nvidia.com>,
Dariusz Sosnowski <dsosnowski@nvidia.com>,
Ori Kam <orika@nvidia.com>, Matan Azrad <matan@nvidia.com>
Cc: <dev@dpdk.org>, <stable@dpdk.org>
Subject: [v2 13/16] net/mlx5/hws: set default miss when replacing table
Date: Mon, 6 May 2024 14:44:16 +0300 [thread overview]
Message-ID: <20240506114419.966498-13-igozlan@nvidia.com> (raw)
In-Reply-To: <20240506114419.966498-1-igozlan@nvidia.com>
Allowing the replacement of a miss table without enforcing
a previous disconnecting. This feature extension allows the
user to change the destination miss table when the system
runs without losing traffic.
Fixes: b81f95ca770d ("net/mlx5/hws: support default miss table")
Cc: stable@dpdk.org
Signed-off-by: Itamar Gozlan <igozlan@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_table.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_table.c b/drivers/net/mlx5/hws/mlx5dr_table.c
index 55b9b20150..ab73017ade 100644
--- a/drivers/net/mlx5/hws/mlx5dr_table.c
+++ b/drivers/net/mlx5/hws/mlx5dr_table.c
@@ -611,8 +611,7 @@ static int mlx5dr_table_set_default_miss_not_valid(struct mlx5dr_table *tbl,
if (mlx5dr_table_is_root(tbl) ||
(miss_tbl && mlx5dr_table_is_root(miss_tbl)) ||
- (miss_tbl && miss_tbl->type != tbl->type) ||
- (miss_tbl && tbl->default_miss.miss_tbl)) {
+ (miss_tbl && miss_tbl->type != tbl->type)) {
DR_LOG(ERR, "Invalid arguments");
rte_errno = EINVAL;
return -rte_errno;
@@ -625,6 +624,7 @@ int mlx5dr_table_set_default_miss(struct mlx5dr_table *tbl,
struct mlx5dr_table *miss_tbl)
{
struct mlx5dr_context *ctx = tbl->ctx;
+ struct mlx5dr_table *old_miss_tbl;
int ret;
ret = mlx5dr_table_set_default_miss_not_valid(tbl, miss_tbl);
@@ -632,15 +632,16 @@ int mlx5dr_table_set_default_miss(struct mlx5dr_table *tbl,
return ret;
pthread_spin_lock(&ctx->ctrl_lock);
-
+ old_miss_tbl = tbl->default_miss.miss_tbl;
ret = mlx5dr_table_connect_to_miss_table(tbl, miss_tbl);
if (ret)
goto out;
+ if (old_miss_tbl)
+ LIST_REMOVE(tbl, default_miss.next);
+
if (miss_tbl)
LIST_INSERT_HEAD(&miss_tbl->default_miss.head, tbl, default_miss.next);
- else
- LIST_REMOVE(tbl, default_miss.next);
pthread_spin_unlock(&ctx->ctrl_lock);
return 0;
--
2.39.3
next prev parent reply other threads:[~2024-05-06 11:45 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240314114220.203241-1-igozlan@nvidia.com>
2024-05-06 11:44 ` [v2 01/16] net/mlx5/hws: move warn into debug level when needed Itamar Gozlan
2024-05-06 11:44 ` [v2 02/16] common/mlx5: fix error in mlx5 prm structs Itamar Gozlan
2024-05-06 11:44 ` [v2 03/16] net/mlx5/hws: fix wrong comment in mlx5dr send Itamar Gozlan
2024-05-06 11:44 ` [v2 07/16] net/mlx5/hws: fix error flow in mlx5dr context open Itamar Gozlan
2024-05-06 11:44 ` [v2 08/16] net/mlx5/hws: fix code analysis error in passing 0 enum val Itamar Gozlan
2024-05-06 11:44 ` [v2 11/16] net/mlx5/hws: extending tag saving for match and jumbo Itamar Gozlan
2024-05-06 11:44 ` [v2 12/16] net/mlx5/hws: dw order optimization code enhancement Itamar Gozlan
2024-05-06 11:44 ` Itamar Gozlan [this message]
2024-05-06 11:44 ` [v2 14/16] net/mlx5/hws: fix invalid memory access in decapl3 Itamar Gozlan
2024-05-06 11:44 ` [v2 16/16] net/mlx5/hws: fix action template only term param dump print Itamar Gozlan
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