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From: Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>
To: Sivaprasad Tummala <sivaprasad.tummala@amd.com>,
	david.marchand@redhat.com
Cc: david.hunt@intel.com, roretzla@linux.microsoft.com,
	anatoly.burakov@intel.com, thomas@monjalon.net,
	ferruh.yigit@amd.com, dev@dpdk.org
Subject: Re: [PATCH v6 3/3] power: amd power monitor support
Date: Tue, 10 Oct 2023 11:14:24 +0100	[thread overview]
Message-ID: <2366fabf-8374-4615-9d46-c97435533f85@yandex.ru> (raw)
In-Reply-To: <20231009140546.862553-3-sivaprasad.tummala@amd.com>

09.10.2023 15:05, Sivaprasad Tummala пишет:
> mwaitx allows EPYC processors to enter a implementation dependent
> power/performance optimized state (C1 state) for a specific period
> or until a store to the monitored address range.
> 
> Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
> Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
> ---
>   lib/eal/x86/rte_power_intrinsics.c | 108 ++++++++++++++++++++++-------
>   1 file changed, 84 insertions(+), 24 deletions(-)
> 
> diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
> index 664cde01e9..0d2953f570 100644
> --- a/lib/eal/x86/rte_power_intrinsics.c
> +++ b/lib/eal/x86/rte_power_intrinsics.c
> @@ -17,6 +17,78 @@ static struct power_wait_status {
>   	volatile void *monitor_addr; /**< NULL if not currently sleeping */
>   } __rte_cache_aligned wait_status[RTE_MAX_LCORE];
>   
> +/**
> + * This functions uses UMONITOR/UMWAIT instructions and will enter C0.2 state.
> + * For more information about usage of these instructions, please refer to
> + * Intel(R) 64 and IA-32 Architectures Software Developer's Manual.
> + */
> +static void intel_umonitor(volatile void *addr)
> +{
> +#if defined(RTE_TOOLCHAIN_MSVC) || defined(__WAITPKG__)
> +	/* cast away "volatile" when using the intrinsic */
> +	_umonitor((void *)(uintptr_t)addr);
> +#else
> +	/*
> +	 * we're using raw byte codes for compiler versions which
> +	 * don't support this instruction natively.
> +	 */
> +	asm volatile(".byte 0xf3, 0x0f, 0xae, 0xf7;"
> +			:
> +			: "D"(addr));
> +#endif
> +}
> +
> +static void intel_umwait(const uint64_t timeout)
> +{
> +	const uint32_t tsc_l = (uint32_t)timeout;
> +	const uint32_t tsc_h = (uint32_t)(timeout >> 32);
> +#if defined(RTE_TOOLCHAIN_MSVC) || defined(__WAITPKG__)
> +	_umwait(tsc_l, tsc_h);
> +#else
> +	asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7;"
> +			: /* ignore rflags */
> +			: "D"(0), /* enter C0.2 */
> +			  "a"(tsc_l), "d"(tsc_h));
> +#endif
> +}
> +
> +/**
> + * This functions uses MONITORX/MWAITX instructions and will enter C1 state.
> + * For more information about usage of these instructions, please refer to
> + * AMD64 Architecture Programmer’s Manual.
> + */
> +static void amd_monitorx(volatile void *addr)
> +{
> +#if defined(__MWAITX__)
> +	/* cast away "volatile" when using the intrinsic */
> +	_mm_monitorx((void *)(uintptr_t)addr, 0, 0);
> +#else
> +	asm volatile(".byte 0x0f, 0x01, 0xfa;"
> +			:
> +			: "a"(addr),
> +			"c"(0),  /* no extensions */
> +			"d"(0)); /* no hints */
> +#endif
> +}
> +
> +static void amd_mwaitx(const uint64_t timeout)
> +{
> +	RTE_SET_USED(timeout);
> +#if defined(__MWAITX__)
> +	_mm_mwaitx(0, 0, 0);
> +#else
> +	asm volatile(".byte 0x0f, 0x01, 0xfb;"
> +			: /* ignore rflags */
> +			: "a"(0), /* enter C1 */
> +			"c"(0)); /* no time-out */
> +#endif
> +}
> +
> +static struct {
> +	void (*mmonitor)(volatile void *addr);
> +	void (*mwait)(const uint64_t timeout);
> +} __rte_cache_aligned power_monitor_ops;
> +
>   static inline void
>   __umwait_wakeup(volatile void *addr)
>   {
> @@ -76,8 +148,6 @@ int
>   rte_power_monitor(const struct rte_power_monitor_cond *pmc,
>   		const uint64_t tsc_timestamp)
>   {
> -	const uint32_t tsc_l = (uint32_t)tsc_timestamp;
> -	const uint32_t tsc_h = (uint32_t)(tsc_timestamp >> 32);
>   	const unsigned int lcore_id = rte_lcore_id();
>   	struct power_wait_status *s;
>   	uint64_t cur_value;
> @@ -105,19 +175,8 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
>   	rte_spinlock_lock(&s->lock);
>   	s->monitor_addr = pmc->addr;
>   
> -	/* set address for UMONITOR */
> -#if defined(RTE_TOOLCHAIN_MSVC) || defined(__WAITPKG__)
> -	/* cast away "volatile" when using the intrinsic */
> -	_umonitor((void *)(uintptr_t)pmc->addr);
> -#else
> -	/*
> -	 * we're using raw byte codes for compiler versions which
> -	 * don't support this instruction natively.
> -	 */
> -	asm volatile(".byte 0xf3, 0x0f, 0xae, 0xf7;"
> -			:
> -			: "D"(pmc->addr));
> -#endif
> +	/* set address for memory monitor */
> +	power_monitor_ops.mmonitor(pmc->addr);
>   
>   	/* now that we've put this address into monitor, we can unlock */
>   	rte_spinlock_unlock(&s->lock);
> @@ -128,15 +187,8 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
>   	if (pmc->fn(cur_value, pmc->opaque) != 0)
>   		goto end;
>   
> -	/* execute UMWAIT */
> -#if defined(RTE_TOOLCHAIN_MSVC) || defined(__WAITPKG__)
> -	_umwait(tsc_l, tsc_h);
> -#else
> -	asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7;"
> -			: /* ignore rflags */
> -			: "D"(0), /* enter C0.2 */
> -			  "a"(tsc_l), "d"(tsc_h));
> -#endif
> +	/* execute mwait */
> +	power_monitor_ops.mwait(tsc_timestamp);
>   
>   end:
>   	/* erase sleep address */
> @@ -186,6 +238,14 @@ RTE_INIT(rte_power_intrinsics_init) {
>   		wait_multi_supported = 1;
>   	if (i.power_monitor)
>   		monitor_supported = 1;
> +
> +	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_MONITORX)) { /* AMD */
> +		power_monitor_ops.mmonitor = &amd_monitorx;
> +		power_monitor_ops.mwait = &amd_mwaitx;
> +	} else { /* Intel */
> +		power_monitor_ops.mmonitor = &intel_umonitor;
> +		power_monitor_ops.mwait = &intel_umwait;
> +	}
>   }
>   
>   int

Acked-by: Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>


  parent reply	other threads:[~2023-10-10 10:14 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-13 11:53 [PATCH v2 1/3] eal: add x86 cpuid support for monitorx Sivaprasad Tummala
2023-04-13 11:53 ` [PATCH v2 2/3] doc: announce new cpu flag added to rte_cpu_flag_t Sivaprasad Tummala
2023-04-17  4:31   ` [PATCH v3 1/4] " Sivaprasad Tummala
2023-04-18  8:14     ` [PATCH v4 0/4] power: monitor support for AMD EPYC processors Sivaprasad Tummala
2023-04-18  8:25     ` Sivaprasad Tummala
2023-04-18  8:25       ` [PATCH v4 1/4] doc: announce new cpu flag added to rte_cpu_flag_t Sivaprasad Tummala
2023-04-18  8:52         ` Ferruh Yigit
2023-04-18  9:22           ` Bruce Richardson
2023-06-01  9:23             ` David Marchand
2023-07-05 11:32         ` Konstantin Ananyev
2023-08-16 18:59         ` [PATCH v5 1/3] eal: add x86 cpuid support for monitorx Sivaprasad Tummala
2023-08-16 18:59           ` [PATCH v5 2/3] eal: removed unnecessary checks in x86 power monitor APIs Sivaprasad Tummala
2023-08-16 18:59           ` [PATCH v5 3/3] power: amd power monitor support Sivaprasad Tummala
2023-08-16 19:27             ` Tyler Retzlaff
2023-08-17 11:34               ` Tummala, Sivaprasad
2023-08-17 14:18                 ` Konstantin Ananyev
2023-08-18 13:25                   ` Ferruh Yigit
2023-08-18 13:48                     ` Bruce Richardson
2023-08-21 15:42                       ` Tyler Retzlaff
2023-08-22 22:30                       ` Konstantin Ananyev
2023-08-23  9:19                         ` Ferruh Yigit
2023-08-23 16:03                           ` Tyler Retzlaff
2023-08-24  9:04                             ` Ferruh Yigit
2023-08-25 16:00                               ` Tyler Retzlaff
2023-08-30 22:45                                 ` Konstantin Ananyev
2023-09-27 10:38                                   ` Tummala, Sivaprasad
2023-09-28 10:11                                     ` Konstantin Ananyev
2023-10-06  8:26             ` David Marchand
2023-10-09  8:02               ` Tummala, Sivaprasad
2023-10-09 14:05             ` [PATCH v6 1/3] eal: add x86 cpuid support for monitorx Sivaprasad Tummala
2023-10-09 14:05               ` [PATCH v6 2/3] eal: removed unnecessary checks in x86 power monitor APIs Sivaprasad Tummala
2023-10-09 14:05               ` [PATCH v6 3/3] power: amd power monitor support Sivaprasad Tummala
2023-10-10  8:59                 ` David Marchand
2023-10-11  9:33                   ` Tummala, Sivaprasad
2023-10-10 10:14                 ` Konstantin Ananyev [this message]
2023-10-09 16:23               ` [PATCH v6 1/3] eal: add x86 cpuid support for monitorx Patrick Robb
2023-10-10  8:21                 ` David Marchand
2023-04-18  8:25       ` [PATCH v4 2/4] " Sivaprasad Tummala
2023-06-14 13:15         ` Burakov, Anatoly
2023-04-18  8:25       ` [PATCH v4 3/4] eal: removed unnecessary checks in x86 power monitor APIs Sivaprasad Tummala
2023-06-14 13:14         ` Burakov, Anatoly
2023-04-18  8:25       ` [PATCH v4 4/4] power: amd power monitor support Sivaprasad Tummala
2023-06-14 13:14         ` Burakov, Anatoly
2023-04-13 11:53 ` [PATCH v2 3/3] " Sivaprasad Tummala
2023-04-17  4:34   ` [PATCH v3 4/4] " Sivaprasad Tummala
2023-04-13 11:59 ` [PATCH v2 1/3] eal: add x86 cpuid support for monitorx David Marchand
2023-04-13 17:50   ` Tummala, Sivaprasad
2023-04-14  7:05     ` David Marchand
2023-04-14  8:51       ` Tummala, Sivaprasad
2023-04-14 11:48       ` Ferruh Yigit
2023-04-17  4:32 ` [PATCH v3 2/4] " Sivaprasad Tummala

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