From: Andrew Rybchenko <arybchenko@solarflare.com>
To: <kirankumark@marvell.com>,
Adrien Mazarguil <adrien.mazarguil@6wind.com>,
John McNamara <john.mcnamara@intel.com>,
Marko Kovacevic <marko.kovacevic@intel.com>,
Thomas Monjalon <thomas@monjalon.net>,
"Ferruh Yigit" <ferruh.yigit@intel.com>
Cc: <dev@dpdk.org>, <ajit.khaparde@broadcom.com>
Subject: Re: [dpdk-dev] [PATCH] ethdev: add HIGIG2 key field to flow API
Date: Mon, 14 Oct 2019 10:08:20 +0300 [thread overview]
Message-ID: <38d75229-554c-5a8d-5aa9-e4dc6e968c00@solarflare.com> (raw)
In-Reply-To: <20191014042956.18616-1-kirankumark@marvell.com>
On 10/14/19 7:29 AM, kirankumark@marvell.com wrote:
> From: Kiran Kumar K <kirankumark@marvell.com>
>
> Add new rte_flow_item_higig2_hdr in order to match higig2 header.
> It is a layer 2.5 protocol and used in broadcom switches.
> Header format is based on the following document.
> http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf
>
> Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
> ---
> doc/guides/prog_guide/rte_flow.rst | 8 ++++
> lib/librte_ethdev/rte_flow.c | 1 +
> lib/librte_ethdev/rte_flow.h | 77 ++++++++++++++++++++++++++++++
As far as I remember support in testpmd is a must requirement
to add new RTE flow API feature.
> 3 files changed, 86 insertions(+)
>
> diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst
> index 1c837ff13..71365b159 100644
> --- a/doc/guides/prog_guide/rte_flow.rst
> +++ b/doc/guides/prog_guide/rte_flow.rst
> @@ -1290,6 +1290,14 @@ Matches a IP Authentication Header (RFC 4302).
> - Default ``mask`` matches spi.
>
>
> +Item: ``HIGIG2``
> +^^^^^^^^^^^^^^^^^
> +
> +Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
> +broadcom switches.
> +
> +- Default ``mask`` matches classification and vlan.
> +
Right now there is one empty line between items and two between
the last item and actions. It should be preserved.
> Actions
> ~~~~~~~
>
> diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
> index 81a85b995..ca0f68016 100644
> --- a/lib/librte_ethdev/rte_flow.c
> +++ b/lib/librte_ethdev/rte_flow.c
> @@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = {
> MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
> MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
> MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
> + MK_FLOW_ITEM(HIGIG2, sizeof(struct rte_flow_item_higig2_hdr)),
> };
>
> /** Generate flow_action[] entry. */
> diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
> index bcfc06cdc..59e37f714 100644
> --- a/lib/librte_ethdev/rte_flow.h
> +++ b/lib/librte_ethdev/rte_flow.h
> @@ -491,6 +491,12 @@ enum rte_flow_item_type {
> *
> */
> RTE_FLOW_ITEM_TYPE_AH,
> +
> + /**
> + * Matches a HIGIG header.
> + * see struct rte_flow_item_higig2_hdr.
> + */
> + RTE_FLOW_ITEM_TYPE_HIGIG2,
> };
>
> /**
> @@ -515,6 +521,77 @@ static const struct rte_flow_item_any rte_flow_item_any_mask = {
> };
> #endif
>
> +/**
> + * RTE_FLOW_ITEM_TYPE_HIGIG2
> + * Matches higig2 header.
> + */
> +struct rte_higig2_frc {
> + uint32_t ksop:8;
> + uint32_t resv:3;
> + uint32_t mcst:1;
> + uint32_t tc:4;
> + uint32_t dst_modid:8;
> + uint32_t dst_pid:8;
> + uint32_t src_modid:8;
> + uint32_t src_pid:8;
> + uint32_t lbid:8;
> + uint32_t dp:2;
> + uint32_t resv1:3;
> + uint32_t ppd_type:3;
> +} __attribute__((packed));
> +
> +struct rte_higig2_ppt_type0 {
> + uint32_t dst_t:1;
> + uint32_t dst_tgid:3;
> + uint32_t ingress_tagged:1;
> + uint32_t mirror_only:1;
> + uint32_t mirror_done:1;
> + uint32_t mirror:1;
> + uint32_t res:2;
> + uint32_t l3:1;
> + uint32_t label_present:1;
> + uint32_t vc_label2:4;
> + uint32_t vc_label1:8;
> + uint32_t vc_label0:8;
> + uint32_t vid_high:8;
> + uint32_t vid_low:8;
> + uint32_t pfm:2;
> + uint32_t src_t:1;
> + uint32_t res1:2;
> + uint32_t opcode:3;
> + uint32_t hdr_ext_len:3;
> + uint32_t res2:5;
> +} __attribute__((packed));
> +
> +struct rte_higig2_ppt_type1 {
> + uint32_t classification:16;
> + uint32_t resv:16;
> + uint32_t vid:16;
> + uint32_t pfm:2;
> + uint32_t src_t:1;
> + uint32_t resv1:2;
> + uint32_t opcode:3;
> + uint32_t hdr_ext_len:3;
> + uint32_t resv2:5;
> +} __attribute__((packed));
> +
Usage of bit fields in network headers require
big/little endian handling. See lib/librte_net/rte_gre.h
Also other network protocol headers are defined in
lib/librte_net.
> +RTE_STD_C11
> +struct rte_flow_item_higig2_hdr {
> + struct rte_higig2_frc fcr;
> + union {
> + struct rte_higig2_ppt_type0 ppt0;
> + struct rte_higig2_ppt_type1 ppt1;
> + };
> +} __attribute__((packed));
> +
> +/** Default mask for RTE_FLOW_ITEM_TYPE_HIGIG2. */
> +#ifndef __cplusplus
> +static const struct rte_flow_item_higig2_hdr rte_flow_item_higig2_hdr_mask = {
> + .ppt1.classification = 0xffff,
> + .ppt1.vid = 0xfff,
> +};
It would be useful to see default mask choice motivation.
> +#endif
> +
> /**
> * RTE_FLOW_ITEM_TYPE_VF
> *
next prev parent reply other threads:[~2019-10-14 7:08 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-14 4:29 kirankumark
2019-10-14 7:08 ` Andrew Rybchenko [this message]
2019-10-15 4:23 ` [dpdk-dev] [EXT] " Kiran Kumar Kokkilagadda
2019-10-15 6:20 ` [dpdk-dev] " kirankumark
2019-10-15 6:27 ` Jerin Jacob
2019-10-15 6:57 ` [dpdk-dev] [EXT] " Kiran Kumar Kokkilagadda
2019-10-15 8:22 ` [dpdk-dev] " Ananyev, Konstantin
2019-10-15 8:32 ` [dpdk-dev] [PATCH v3] " kirankumark
2019-10-17 4:15 ` [dpdk-dev] [PATCH v4] " kirankumark
2019-10-17 9:08 ` Andrew Rybchenko
2019-10-18 4:13 ` [dpdk-dev] [PATCH v5] " kirankumark
2019-10-18 7:36 ` Andrew Rybchenko
2019-10-18 17:36 ` Ferruh Yigit
2019-10-19 4:51 ` [dpdk-dev] [EXT] " Kiran Kumar Kokkilagadda
2019-10-19 4:56 ` [dpdk-dev] [PATCH v6] " kirankumark
2019-10-19 9:47 ` Jerin Jacob
2019-10-20 4:52 ` [dpdk-dev] [PATCH v7] " kirankumark
2019-10-20 13:56 ` Jerin Jacob
2019-10-21 3:52 ` [dpdk-dev] [PATCH v8] " kirankumark
2019-10-21 9:16 ` [dpdk-dev] [PATCH v9] " kirankumark
2019-10-21 16:48 ` Olivier Matz
2019-10-22 4:16 ` [dpdk-dev] [PATCH v10] " kirankumark
2019-10-22 9:19 ` Ferruh Yigit
2019-10-23 10:50 ` Raslan Darawsheh
2019-10-23 11:39 ` Olivier Matz
2019-10-23 11:43 ` [dpdk-dev] [EXT] " Kiran Kumar Kokkilagadda
2019-10-23 14:04 ` Olivier Matz
2019-10-23 14:14 ` Ferruh Yigit
2019-10-23 22:04 ` [dpdk-dev] " Thomas Monjalon
2019-10-15 16:47 ` [dpdk-dev] [PATCH] " Stephen Hemminger
2019-10-16 3:14 ` [dpdk-dev] [EXT] " Kiran Kumar Kokkilagadda
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