From: "Lu, Wenzhuo" <wenzhuo.lu@intel.com>
To: "Kulasek, TomaszX" <tomaszx.kulasek@intel.com>,
"dev@dpdk.org" <dev@dpdk.org>
Cc: "Zhang, Helin" <helin.zhang@intel.com>,
"Ananyev, Konstantin" <konstantin.ananyev@intel.com>
Subject: Re: [dpdk-dev] [PATCH] ixgbe: fix bad shift operation in ixgbe_set_pool_tx
Date: Mon, 18 Apr 2016 01:58:02 +0000 [thread overview]
Message-ID: <6A0DE07E22DDAD4C9103DF62FEBC090903455FBF@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <1460730779-8200-1-git-send-email-tomaszx.kulasek@intel.com>
Hi,
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Tomasz Kulasek
> Sent: Friday, April 15, 2016 10:33 PM
> To: dev@dpdk.org
> Cc: Zhang, Helin; Ananyev, Konstantin
> Subject: [dpdk-dev] [PATCH] ixgbe: fix bad shift operation in ixgbe_set_pool_tx
>
> CID 13190 (#1 of 1): Bad bit shift operation (BAD_SHIFT)
> large_shift: In expression 1 << pool, left shifting by more than 31 bits has
> undefined behavior. The shift amount, pool, is at least 32.
>
> This patch limits mask shift to be in range of 32 bit PFVFTE[1] register, for pool >
> 31.
>
> Fixes: fe3a45fd4104 ("ixgbe: add VMDq support")
>
> Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
next prev parent reply other threads:[~2016-04-18 1:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-15 14:32 Tomasz Kulasek
2016-04-18 1:58 ` Lu, Wenzhuo [this message]
2016-04-21 13:53 ` Bruce Richardson
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