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From: Ferruh Yigit <ferruh.yigit@amd.com>
To: Jiawen Wu <jiawenwu@trustnetic.com>, dev@dpdk.org
Cc: stable@dpdk.org
Subject: Re: [PATCH 1/8] net/txgbe: fix Rx buffer size in configure register
Date: Wed, 1 Feb 2023 10:40:55 +0000	[thread overview]
Message-ID: <6e9e8ae1-0ebf-db1e-1b2a-b203f6923343@amd.com> (raw)
In-Reply-To: <026901d935e5$b4d52230$1e7f6690$@trustnetic.com>

On 2/1/2023 2:34 AM, Jiawen Wu wrote:
> On Friday, January 27, 2023 11:36 PM, Ferruh Yigit wrote:
>> On 1/18/2023 6:00 AM, Jiawen Wu wrote:
>>> When round up buffer size to 1K, to configure the register, hardware
>>> will receive packets exceeding the buffer size in LRO mode. It will
>>> cause a segment fault in the receive function.
>>>
>>> Fixes: be797cbf4582 ("net/txgbe: add Rx and Tx init")
>>> Cc: stable@dpdk.org
>>>
>>> Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
>>> ---
>>>  drivers/net/txgbe/txgbe_rxtx.c | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/net/txgbe/txgbe_rxtx.c
>>> b/drivers/net/txgbe/txgbe_rxtx.c index ac1bba08a3..ae70ca3beb 100644
>>> --- a/drivers/net/txgbe/txgbe_rxtx.c
>>> +++ b/drivers/net/txgbe/txgbe_rxtx.c
>>> @@ -4382,7 +4382,7 @@ txgbe_dev_rx_init(struct rte_eth_dev *dev)
>>>  		 */
>>>  		buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -
>>>  			RTE_PKTMBUF_HEADROOM);
>>> -		buf_size = ROUND_UP(buf_size, 0x1 << 10);
>>> +		buf_size = ROUND_DOWN(buf_size, 0x1 << 10);
>>>  		srrctl |= TXGBE_RXCFG_PKTLEN(buf_size);
>>>
>>
>> What if 'buf_size' is less than 1K, won't 'ROUND_DOWN' make it 0, and I assume
>> setting 0 to register may cause problem.
>>
> 
> It is indeed a problem, I will fix it.
> 
>> And according to the code comment for 'buf_size' [1], buffer size can't be more than
>> 16K, but technically 'buf_size' can be more than 16K.
>> Does the HW constrain values larger than 16K? If not the 'buf_size'
>> value needs to be checked against the 16K limit.
>>
> 
> There is a macro that defines the conversion to limit 16K.
> 
> #define PKTLEN(v)     ROUND_OVER(v, 14, 10)
> #define ROUND_OVER(x, maxbits, unitbits) \
> 	((x) >= 1 << (maxbits) ? 0 : (x) >> (unitbits))
> 

ack


  reply	other threads:[~2023-02-01 10:41 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20230118060039.3074016-1-jiawenwu@trustnetic.com>
2023-01-18  6:00 ` Jiawen Wu
2023-01-27 15:36   ` Ferruh Yigit
2023-02-01  2:34     ` Jiawen Wu
2023-02-01 10:40       ` Ferruh Yigit [this message]
2023-01-18  6:00 ` [PATCH 2/8] net/txgbe: fix default signal quality value for KX/KX4 Jiawen Wu
2023-01-18  6:00 ` [PATCH 3/8] net/txgbe: fix packet type to parse from offload flags Jiawen Wu
2023-01-27 15:36   ` Ferruh Yigit
2023-02-01  3:14     ` Jiawen Wu
2023-02-01 10:41       ` Ferruh Yigit
2023-01-18  6:00 ` [PATCH 4/8] net/ngbe: " Jiawen Wu
2023-01-27 15:37   ` Ferruh Yigit
2023-01-18  6:00 ` [PATCH 5/8] net/ngbe: add spinlock protection on YT PHY Jiawen Wu
     [not found] ` <20230202092132.3271910-1-jiawenwu@trustnetic.com>
2023-02-02  9:21   ` [PATCH v2 01/10] net/ngbe: fix Rx buffer size in configure register Jiawen Wu
2023-02-08 10:28     ` Ferruh Yigit
2023-02-09  9:00       ` Jiawen Wu
2023-02-14  8:15         ` Jiawen Wu
2023-02-14  9:55           ` Ferruh Yigit
2023-02-15  9:35             ` Ferruh Yigit
2023-02-15 10:09               ` Jiawen Wu
2023-02-02  9:21   ` [PATCH v2 02/10] net/txgbe: " Jiawen Wu
2023-02-02  9:21   ` [PATCH v2 03/10] net/txgbe: fix default signal quality value for KX/KX4 Jiawen Wu
2023-02-02  9:21   ` [PATCH v2 04/10] net/txgbe: fix packet type to parse from offload flags Jiawen Wu
2023-02-02  9:21   ` [PATCH v2 05/10] net/ngbe: " Jiawen Wu
2023-02-02  9:21   ` [PATCH v2 06/10] net/ngbe: add spinlock protection on YT PHY Jiawen Wu
2023-02-02  9:21   ` [PATCH v2 09/10] net/txgbe: fix interrupt loss Jiawen Wu
2023-02-15  2:00 ` [PATCH v3] net/txgbe: fix Rx buffer size in configure register Jiawen Wu
2023-02-15 10:24   ` Ferruh Yigit

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