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From: Ruifeng Wang <Ruifeng.Wang@arm.com>
To: "pbhagavatula@marvell.com" <pbhagavatula@marvell.com>,
	"konstantin.ananyev@intel.com" <konstantin.ananyev@intel.com>,
	"jerinj@marvell.com" <jerinj@marvell.com>,
	Yipeng Wang <yipeng1.wang@intel.com>,
	Sameh Gobriel <sameh.gobriel@intel.com>,
	Bruce Richardson <bruce.richardson@intel.com>,
	Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>, nd <nd@arm.com>
Subject: Re: [dpdk-dev] [PATCH v4 2/2] hash: unify crc32 selection for x86 and Arm
Date: Mon, 18 Oct 2021 09:21:44 +0000	[thread overview]
Message-ID: <AS8PR08MB7080A4B91496CA1912339ECF9EBC9@AS8PR08MB7080.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20211004055255.12947-2-pbhagavatula@marvell.com>

> -----Original Message-----
> From: pbhagavatula@marvell.com <pbhagavatula@marvell.com>
> Sent: Monday, October 4, 2021 1:53 PM
> To: Ruifeng Wang <Ruifeng.Wang@arm.com>;
> konstantin.ananyev@intel.com; jerinj@marvell.com; Yipeng Wang
> <yipeng1.wang@intel.com>; Sameh Gobriel <sameh.gobriel@intel.com>;
> Bruce Richardson <bruce.richardson@intel.com>; Vladimir Medvedkin
> <vladimir.medvedkin@intel.com>
> Cc: dev@dpdk.org; Pavan Nikhilesh <pbhagavatula@marvell.com>
> Subject: [dpdk-dev] [PATCH v4 2/2] hash: unify crc32 selection for x86 and
> Arm
> 
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
> 
> Merge crc32 hash calculation public API implementation for x86 and Arm.
> Select the best available CRC32 algorithm when unsupported algorithm on a
> given CPU architecture is requested by an application.
> 
> Previously, if an application directly includes `rte_crc_arm64.h` without
> including `rte_hash_crc.h` it will fail to compile.
> 
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> ---
>  lib/hash/hash_crc_arm64.h |  48 ++++++++++
>  lib/hash/meson.build      |   1 -
>  lib/hash/rte_crc_arm64.h  | 183 --------------------------------------
>  lib/hash/rte_hash_crc.h   |  81 +++++++++++++----
>  4 files changed, 112 insertions(+), 201 deletions(-)  create mode 100644
> lib/hash/hash_crc_arm64.h  delete mode 100644 lib/hash/rte_crc_arm64.h
> 
<snip>
> diff --git a/lib/hash/rte_hash_crc.h b/lib/hash/rte_hash_crc.h index
> 1cc8f84fe2..a51f6d3cc4 100644
> --- a/lib/hash/rte_hash_crc.h
> +++ b/lib/hash/rte_hash_crc.h
> @@ -16,10 +16,18 @@ extern "C" {
>  #endif
> 
>  #include <stdint.h>
> -#include <rte_config.h>
> -#include <rte_cpuflags.h>
> +
>  #include <rte_branch_prediction.h>
>  #include <rte_common.h>
> +#include <rte_config.h>
> +#include <rte_cpuflags.h>
> +#include <rte_log.h>
> +
> +#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
> #include
> +"hash_crc_arm64.h"
> +#elif defined(RTE_ARCH_X86)
> +#include "hash_crc_x86.h"
> +#endif
> 
>  #include <hash_crc_sw.h>
> 
> @@ -31,37 +39,64 @@ extern "C" {
> 
>  static uint8_t crc32_alg = CRC32_SW;
> 
> -#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) -
> #include "rte_crc_arm64.h"
> -#else
> -#include "hash_crc_x86.h"
> -
>  /**
> - * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash
> + * Allow or disallow use of SSE4.2/ARMv8 intrinsics for CRC32 hash
>   * calculation.
>   *
>   * @param alg
>   *   An OR of following flags:
> - *   - (CRC32_SW) Don't use SSE4.2 intrinsics
> + *   - (CRC32_SW) Don't use SSE4.2/ARMv8 intrinsics (default non-
> [x86/ARMv8])
>   *   - (CRC32_SSE42) Use SSE4.2 intrinsics if available
> - *   - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default)
> + *   - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default x86)
> + *   - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8)
>   *
>   */
>  static inline void
>  rte_hash_crc_set_alg(uint8_t alg)

hash_crc_arm64.h and hash_crc_x86.h are there. How about leaving only function declaration in rte_hash_crc.h, and
have implementations in arch specific files?
By this way, ifdefs in the implementation can be dropped.

>  {
> -#if defined(RTE_ARCH_X86)
> -	if (alg == CRC32_SSE42_x64 &&
> -			!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
> -		alg = CRC32_SSE42;
> +	switch (alg) {
> +	case CRC32_SSE42_x64:
> +	case CRC32_SSE42:
> +#if defined RTE_ARCH_X86
> +		if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
> +			crc32_alg = CRC32_SSE42;
> +		else
> +			crc32_alg = alg;
> +#endif
> +#if defined RTE_ARCH_ARM64
> +		RTE_LOG(WARNING, HASH,
> +			"Incorrect CRC32 algorithm requested setting best
> available algorithm on the architecture\n");
> +		rte_hash_crc_set_alg(CRC32_ARM64);
>  #endif
> -	crc32_alg = alg;
> +		break;
> +	case CRC32_ARM64:
> +#if defined RTE_ARCH_ARM64
> +		if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32))
> +			crc32_alg = CRC32_ARM64;
> +#endif
> +#if defined RTE_ARCH_X86
> +		RTE_LOG(WARNING, HASH,
> +			"Incorrect CRC32 algorithm requested setting best
> available algorithm on the architecture\n");
> +		rte_hash_crc_set_alg(CRC32_SSE42_x64);
> +#endif
> +		break;
> +	case CRC32_SW:
> +	default:
> +		crc32_alg = CRC32_SW;
> +		break;
> +	}
>  }
> 
>  /* Setting the best available algorithm */
>  RTE_INIT(rte_hash_crc_init_alg)
>  {
> +#if defined(RTE_ARCH_X86)
>  	rte_hash_crc_set_alg(CRC32_SSE42_x64);
> +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
> +	rte_hash_crc_set_alg(CRC32_ARM64);
> +#else
> +	rte_hash_crc_set_alg(CRC32_SW);
> +#endif
>  }
> 
>  /**
> @@ -82,6 +117,9 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val)  #if

Same for these APIs.

> defined RTE_ARCH_X86
>  	if (likely(crc32_alg & CRC32_SSE42))
>  		return crc32c_sse42_u8(data, init_val);
> +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
> +	if (likely(crc32_alg & CRC32_ARM64))
> +		return crc32c_arm64_u8(data, init_val);
>  #endif
> 
>  	return crc32c_1byte(data, init_val);
> @@ -105,6 +143,9 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
> #if defined RTE_ARCH_X86
>  	if (likely(crc32_alg & CRC32_SSE42))
>  		return crc32c_sse42_u16(data, init_val);
> +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
> +	if (likely(crc32_alg & CRC32_ARM64))
> +		return crc32c_arm64_u16(data, init_val);
>  #endif
> 
>  	return crc32c_2bytes(data, init_val);
> @@ -128,6 +169,9 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
> #if defined RTE_ARCH_X86
>  	if (likely(crc32_alg & CRC32_SSE42))
>  		return crc32c_sse42_u32(data, init_val);
> +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
> +	if (likely(crc32_alg & CRC32_ARM64))
> +		return crc32c_arm64_u32(data, init_val);
>  #endif
> 
>  	return crc32c_1word(data, init_val);
> @@ -158,11 +202,14 @@ rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
>  		return crc32c_sse42_u64_mimic(data, init_val);  #endif
> 
> +#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
> +	if (likely(crc32_alg & CRC32_ARM64))
> +		return crc32c_arm64_u64(data, init_val); #endif
> +
>  	return crc32c_2words(data, init_val);
>  }
> 
> -#endif
> -
>  /**
>   * Calculate CRC32 hash on user-supplied byte array.
>   *
> --
> 2.17.1


  reply	other threads:[~2021-10-18  9:22 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-29 18:05 [dpdk-dev] [RFC] hash: unify crc32 API header for x86 and ARM pbhagavatula
2020-04-30  9:14 ` Van Haaren, Harry
2020-04-30  9:27   ` Pavan Nikhilesh Bhagavatula
2020-05-06 22:02 ` Wang, Yipeng1
2020-05-10 22:49   ` Pavan Nikhilesh Bhagavatula
2020-05-08 12:55 ` Ananyev, Konstantin
2020-05-10 22:53   ` Pavan Nikhilesh Bhagavatula
2020-05-11  9:46     ` Ananyev, Konstantin
2020-05-11 10:23       ` Pavan Nikhilesh Bhagavatula
2020-05-11 10:27         ` Ananyev, Konstantin
2020-05-11 10:57           ` Pavan Nikhilesh Bhagavatula
2020-05-11 12:10             ` Ananyev, Konstantin
2020-05-11 12:32               ` Pavan Nikhilesh Bhagavatula
2020-05-12 20:40 ` [dpdk-dev] [RFC v2] " pbhagavatula
2020-05-13  3:04   ` Ruifeng Wang
2020-05-13 13:22     ` Ananyev, Konstantin
2021-10-03 23:00   ` [dpdk-dev] [PATCH v3 1/2] hash: split x86 and SW hash CRC intrinsics pbhagavatula
2021-10-03 23:00     ` [dpdk-dev] [PATCH v3 2/2] hash: unify crc32 selection for x86 and Arm pbhagavatula
2021-10-04  5:52     ` [dpdk-dev] [PATCH v4 1/2] hash: split x86 and SW hash CRC intrinsics pbhagavatula
2021-10-04  5:52       ` [dpdk-dev] [PATCH v4 2/2] hash: unify crc32 selection for x86 and Arm pbhagavatula
2021-10-18  9:21         ` Ruifeng Wang [this message]
2021-11-05 10:10       ` [dpdk-dev] [PATCH v5 1/2] hash: split x86 and SW hash CRC intrinsics pbhagavatula
2021-11-05 10:10         ` [dpdk-dev] [PATCH v5 2/2] hash: unify crc32 selection for x86 and Arm pbhagavatula
2022-01-04  9:12           ` Ruifeng Wang
2022-04-08  9:16             ` David Marchand
2021-11-16 14:57         ` [dpdk-dev] [PATCH v5 1/2] hash: split x86 and SW hash CRC intrinsics David Marchand
2022-04-27 13:35         ` [PATCH v6 " Pavan Nikhilesh
2022-04-27 13:35           ` [PATCH v6 2/2] hash: unify crc32 selection for x86 and Arm Pavan Nikhilesh
2022-04-27 15:22           ` [PATCH v7 1/2] hash: split x86 and SW hash CRC intrinsics Pavan Nikhilesh
2022-04-27 15:22             ` [PATCH v7 2/2] hash: unify crc32 selection for x86 and Arm Pavan Nikhilesh
2022-04-29  7:19               ` Ruifeng Wang
2022-04-29  7:18             ` [PATCH v7 1/2] hash: split x86 and SW hash CRC intrinsics Ruifeng Wang
2022-04-29 13:29             ` David Marchand
2022-04-29 15:56               ` [EXT] " Pavan Nikhilesh Bhagavatula
2022-04-29 16:16             ` [PATCH v8 " Pavan Nikhilesh
2022-04-29 16:17               ` [PATCH v8 2/2] hash: unify crc32 selection for x86 and Arm Pavan Nikhilesh
2022-05-03 14:33                 ` David Marchand
2022-05-04  2:53                 ` Wang, Yipeng1
2022-05-11 14:23                   ` David Marchand
2022-05-04  2:19               ` [PATCH v8 1/2] hash: split x86 and SW hash CRC intrinsics Wang, Yipeng1
2022-05-13 18:27               ` [PATCH v9 " pbhagavatula
2022-05-13 18:27                 ` [PATCH v9 2/2] hash: unify crc32 selection for x86 and Arm pbhagavatula
2022-05-19 14:20                   ` David Marchand

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