From: "Chautru, Nicolas" <nicolas.chautru@intel.com>
To: Akhil Goyal <gakhil@marvell.com>,
"Vargas, Hernan" <hernan.vargas@intel.com>,
"dev@dpdk.org" <dev@dpdk.org>,
"trix@redhat.com" <trix@redhat.com>
Cc: "Zhang, Qi Z" <qi.z.zhang@intel.com>
Subject: RE: [EXT] [PATCH v1 5/5] baseband/fpga_5gnr_fec: remove filler from HARQ
Date: Fri, 20 May 2022 01:25:09 +0000 [thread overview]
Message-ID: <BY5PR11MB4451D15F3372C2517FA03ADAF8D39@BY5PR11MB4451.namprd11.prod.outlook.com> (raw)
In-Reply-To: <CO6PR18MB4484925E91ADA3E1D70D6AA0D8CF9@CO6PR18MB4484.namprd18.prod.outlook.com>
Hernan,
Please be more explicit on the commit description in the next patch version, suggesting below:
The computation of the HARQ output length should not include the filler bits on the N3000 HW implementation as these are already taken out by the deratematching step.
The change is only an optimization (no functional impact), no change required on stable branches.
Thanks
Nic
> -----Original Message-----
> From: Akhil Goyal <gakhil@marvell.com>
> Sent: Monday, May 16, 2022 11:07 AM
> To: Vargas, Hernan <hernan.vargas@intel.com>; dev@dpdk.org;
> trix@redhat.com
> Cc: Chautru, Nicolas <nicolas.chautru@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>
> Subject: RE: [EXT] [PATCH v1 5/5] baseband/fpga_5gnr_fec: remove filler
> from HARQ
>
> > Removed dec->n_filler from harq_out_length calculation.
> >
> Please provide a better description describing the reason to remove it.
prev parent reply other threads:[~2022-05-20 1:25 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-09 20:17 [PATCH v1 0/5] baseband/fpga_5gnr: maintenance changes to fpga_5gnr PMD Hernan
2022-05-09 20:17 ` [PATCH v1 1/5] baseband/fpga_5gnr_fec: remove FLR timeout Hernan
2022-05-09 20:17 ` [PATCH v1 2/5] baseband/fpga_5gnr_fec: add FPGA Mutex Hernan
2022-05-16 18:08 ` [EXT] " Akhil Goyal
2022-05-20 1:30 ` Chautru, Nicolas
2022-05-09 20:17 ` [PATCH v1 3/5] baseband/fpga_5gnr_fec: add check for HARQ input length Hernan
2022-05-09 20:17 ` [PATCH v1 4/5] baseband/fpga_5gnr_fec: enable validate LDPC enc/dec Hernan
2022-05-09 21:04 ` Chautru, Nicolas
2022-05-09 20:17 ` [PATCH v1 5/5] baseband/fpga_5gnr_fec: remove filler from HARQ Hernan
2022-05-16 18:07 ` [EXT] " Akhil Goyal
2022-05-20 1:25 ` Chautru, Nicolas [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=BY5PR11MB4451D15F3372C2517FA03ADAF8D39@BY5PR11MB4451.namprd11.prod.outlook.com \
--to=nicolas.chautru@intel.com \
--cc=dev@dpdk.org \
--cc=gakhil@marvell.com \
--cc=hernan.vargas@intel.com \
--cc=qi.z.zhang@intel.com \
--cc=trix@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).