From: Jerin Jacob <jerinjacobk@gmail.com>
To: Rahul Bhansali <rbhansali@marvell.com>
Cc: dev@dpdk.org, Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>
Subject: Re: [PATCH v2 5/5] net/cnxk: select optimized LLC transaction type
Date: Fri, 23 Feb 2024 14:34:27 +0530 [thread overview]
Message-ID: <CALBAE1Oi+9GMT4do1GSRvzNxE_B8XyqmTdyfGruTBgruZNRr-Q@mail.gmail.com> (raw)
In-Reply-To: <20240222100729.991411-5-rbhansali@marvell.com>
On Thu, Feb 22, 2024 at 3:38 PM Rahul Bhansali <rbhansali@marvell.com> wrote:
>
> LLC transaction optimization by using LDWB LDTYPE option
> in SG preparation for Tx. With this, if data is present
> and dirty in LLC then the LLC would mark the data clean.
>
> Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Series applied to dpdk-next-net-mrvl/for-main. Thanks
> ---
> Changes in v2: No change
>
> drivers/net/cnxk/cn10k_tx.h | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h
> index 664e47e1fc..fcd19be77e 100644
> --- a/drivers/net/cnxk/cn10k_tx.h
> +++ b/drivers/net/cnxk/cn10k_tx.h
> @@ -331,9 +331,15 @@ cn10k_nix_tx_skeleton(struct cn10k_eth_txq *txq, uint64_t *cmd,
> else
> cmd[2] = NIX_SUBDC_EXT << 60;
> cmd[3] = 0;
> - cmd[4] = (NIX_SUBDC_SG << 60) | BIT_ULL(48);
> + if (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F))
> + cmd[4] = (NIX_SUBDC_SG << 60) | (NIX_SENDLDTYPE_LDWB << 58) | BIT_ULL(48);
> + else
> + cmd[4] = (NIX_SUBDC_SG << 60) | BIT_ULL(48);
> } else {
> - cmd[2] = (NIX_SUBDC_SG << 60) | BIT_ULL(48);
> + if (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F))
> + cmd[2] = (NIX_SUBDC_SG << 60) | (NIX_SENDLDTYPE_LDWB << 58) | BIT_ULL(48);
> + else
> + cmd[2] = (NIX_SUBDC_SG << 60) | BIT_ULL(48);
> }
> }
>
> @@ -1989,7 +1995,11 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws,
>
> senddesc01_w1 = vdupq_n_u64(0);
> senddesc23_w1 = senddesc01_w1;
> - sgdesc01_w0 = vdupq_n_u64((NIX_SUBDC_SG << 60) | BIT_ULL(48));
> + if (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F))
> + sgdesc01_w0 = vdupq_n_u64((NIX_SUBDC_SG << 60) | (NIX_SENDLDTYPE_LDWB << 58) |
> + BIT_ULL(48));
> + else
> + sgdesc01_w0 = vdupq_n_u64((NIX_SUBDC_SG << 60) | BIT_ULL(48));
> sgdesc23_w0 = sgdesc01_w0;
>
> if (flags & NIX_TX_NEED_EXT_HDR) {
> --
> 2.25.1
>
prev parent reply other threads:[~2024-02-23 9:04 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-19 5:57 [PATCH 1/5] common/cnxk: reserve CPT LF for Rx inject Rahul Bhansali
2024-01-19 5:57 ` [PATCH 2/5] net/cnxk: support of " Rahul Bhansali
2024-02-22 8:55 ` Jerin Jacob
2024-01-19 5:57 ` [PATCH 3/5] common/cnxk: fix for inline dev pointer check Rahul Bhansali
2024-01-19 5:57 ` [PATCH 4/5] net/cnxk: fix to add reassembly fast path flag Rahul Bhansali
2024-01-19 5:57 ` [PATCH 5/5] net/cnxk: select optimized LLC transaction type Rahul Bhansali
2024-02-22 10:07 ` [PATCH v2 1/5] common/cnxk: reserve CPT LF for Rx inject Rahul Bhansali
2024-02-22 10:07 ` [PATCH v2 2/5] net/cnxk: support of " Rahul Bhansali
2024-02-22 10:07 ` [PATCH v2 3/5] common/cnxk: fix for inline dev pointer check Rahul Bhansali
2024-02-22 10:07 ` [PATCH v2 4/5] net/cnxk: fix to add reassembly fast path flag Rahul Bhansali
2024-02-22 10:07 ` [PATCH v2 5/5] net/cnxk: select optimized LLC transaction type Rahul Bhansali
2024-02-23 9:04 ` Jerin Jacob [this message]
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