From: Ed Czeck <ed.czeck@atomicrules.com>
To: Stephen Hemminger <stephen@networkplumber.org>
Cc: dev@dpdk.org
Subject: Re: [dpdk-dev] [PATCH v3 2/7] net/ark: HW API part 1 of 3
Date: Wed, 22 Mar 2017 10:36:25 -0400 [thread overview]
Message-ID: <CALZ3Guhm9bQcpkptDg7Y9F7ij4hNft0ifvUXQ+VaiiAUNuxsOA@mail.gmail.com> (raw)
In-Reply-To: <20170321173029.15af2a76@xeon-e3>
Hi Stephen,
The issue is not ordering or synchronizing IO read and write operations, so
memory barriers are not the solution and will not address the compile
optimizations which the volatile qualifier avoids. The linux kernel guide
states: "The volatile storage class was originally meant for memory-mapped
I/O registers." This is the usage in this case.
The use of rte_read32() and other functions in that family are merely
wrappers to casts to volatile. These functions and other wrappers are used
throughout the drivers/net code. However, the use of these functions
requires that every access point be manually decided and checked. By
adding the volatile qualifier to the struct definition, there is no need to
use these wrappers, since the struct definition is true to the physical
hardware implementation.
On Tue, Mar 21, 2017 at 8:30 PM, Stephen Hemminger <
stephen@networkplumber.org> wrote:
> On Tue, 21 Mar 2017 20:13:48 -0400
> Ed Czeck <ed.czeck@atomicrules.com> wrote:
>
> > Hi Stephen,
> >
> > Yes I understand the paranoid issue of volatile modifier, which is the
> > reason it was coded in this manner.
> >
> > The struct with volatile are memory mapped IO structures. These
> structure
> > are not instantiated in memory and hence do not incur concurrent (host)
> > software access. The a vast majority of the fields as read-only (as
> viewed
> > by the host.) The concurrency model is that hardware is the producer,
> and
> > the host the consumer. There is no handshake other than the host must
> not
> > expect the memory location to remain constant -- that is optimization
> off.
> >
> > As for performance, these structures are not in any critical path, so he
> > optimization path is correctness not performance.
> >
> > Do you have a recommendation for changing this code without using the
> > volatile modifier? I have requirements from the hardware in the pattern
> of:
> > write a 1 to location x
> > read from location y until it become 0
> > write a 0 to location x
> > How can this work without a volatile modified on x and y?
> >
> > Best,
> > Ed.
>
> Learn to use explicit memory barriers. DPDK has rmb()/wmb() just like
> kernel.
>
> Once again good explanation of memory barriers in kernel doc.
>
next prev parent reply other threads:[~2017-03-22 14:36 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-21 21:43 [dpdk-dev] [PATCH v3 1/7] net/ark: PMD for Atomic Rules Arkville driver stub Ed Czeck
2017-03-21 21:43 ` [dpdk-dev] [PATCH v3 2/7] net/ark: HW API part 1 of 3 Ed Czeck
2017-03-21 22:15 ` Stephen Hemminger
2017-03-22 0:13 ` Ed Czeck
2017-03-22 0:30 ` Stephen Hemminger
2017-03-22 14:36 ` Ed Czeck [this message]
2017-03-21 21:43 ` [dpdk-dev] [PATCH v3 3/7] net/ark: HW API part 2 " Ed Czeck
2017-03-21 21:43 ` [dpdk-dev] [PATCH v3 4/7] net/ark: HW API part 3 " Ed Czeck
2017-03-21 21:43 ` [dpdk-dev] [PATCH v3 5/7] net/ark: Packet TX support initial version Ed Czeck
2017-03-21 21:43 ` [dpdk-dev] [PATCH v3 6/7] net/ark: Packet RX " Ed Czeck
2017-03-21 21:43 ` [dpdk-dev] [PATCH v3 7/7] net/ark: Arkville PMD component integration Ed Czeck
2017-03-22 18:16 ` [dpdk-dev] [PATCH v3 1/7] net/ark: PMD for Atomic Rules Arkville driver stub Ferruh Yigit
2017-03-23 1:09 ` Ed Czeck
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