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From: Akhil Goyal <akhil.goyal@nxp.com>
To: "Kusztal, ArkadiuszX" <arkadiuszx.kusztal@intel.com>,
	"dev@dpdk.org" <dev@dpdk.org>,
	"Doherty, Declan" <declan.doherty@intel.com>
Cc: "Jain, Deepak K" <deepak.k.jain@intel.com>,
	"Trahe, Fiona" <fiona.trahe@intel.com>,
	"Griffin, John" <john.griffin@intel.com>
Subject: Re: [dpdk-dev] [PATCH] test_cryptodev_perf: IV and digest should be stored at a DMAeble address
Date: Fri, 7 Oct 2016 11:32:55 +0000	[thread overview]
Message-ID: <DB3PR04MB1077F8F876A68CA43704371E6C60@DB3PR04MB107.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <80307F746F1522479831AB1253B7024E6E9988@IRSMSX102.ger.corp.intel.com>

Hi Arek,

Ok. I would rebase the patch.
Regarding changes required to qat_snow3g, I do not have setup to test on qat and the hardware that I test, currently snow3g support is not added. I can send the patches for snow3g at some later stage.

Regards,
Akhil

-----Original Message-----
From: Kusztal, ArkadiuszX [mailto:arkadiuszx.kusztal@intel.com] 
Sent: Wednesday, October 05, 2016 2:57 PM
To: Akhil Goyal <akhil.goyal@nxp.com>; dev@dpdk.org; Doherty, Declan <declan.doherty@intel.com>
Cc: Jain, Deepak K <deepak.k.jain@intel.com>; Trahe, Fiona <fiona.trahe@intel.com>; Griffin, John <john.griffin@intel.com>
Subject: RE: [dpdk-dev] [PATCH] test_cryptodev_perf: IV and digest should be stored at a DMAeble address

Hi Akhil,

Could you rebase it against newest next-crypto subtree, there were changes with function names in the meantime.
And to make it really consistent across all hw tests could you add this change to qat_snow3g too, for snow3g I assume aad need to obtain correct physical address too.

Regards,
Arek

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Akhil Goyal
> Sent: Wednesday, October 05, 2016 7:40 AM
> To: dev@dpdk.org; Doherty, Declan <declan.doherty@intel.com>
> Subject: Re: [dpdk-dev] [PATCH] test_cryptodev_perf: IV and digest 
> should be stored at a DMAeble address
> 
> On 9/26/2016 10:03 PM, akhil.goyal@nxp.com wrote:
> > From: Akhil Goyal <akhil.goyal@nxp.com>
> >
> > For physical crypto devices, IV and digest are processed by the 
> > crypto device which need the contents to be written on some DMA able address.
> >
> > So in order to do that, IV and digest are accomodated in the packet.
> >
> > Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> > ---
> >  app/test/test_cryptodev_perf.c | 10 ++++++++--
> >  1 file changed, 8 insertions(+), 2 deletions(-)
> >
> > diff --git a/app/test/test_cryptodev_perf.c 
> > b/app/test/test_cryptodev_perf.c index 0ea7ec1..930d5b8 100644
> > --- a/app/test/test_cryptodev_perf.c
> > +++ b/app/test/test_cryptodev_perf.c
> > @@ -2366,9 +2366,13 @@ test_perf_set_crypto_op(struct rte_crypto_op
> *op, struct rte_mbuf *m,
> >  	op->sym->auth.aad.length = AES_CBC_CIPHER_IV_LENGTH;
> >
> >  	/* Cipher Parameters */
> > -	op->sym->cipher.iv.data = aes_cbc_iv;
> > +	op->sym->cipher.iv.data = (uint8_t *)m->buf_addr + m->data_off;
> > +	op->sym->cipher.iv.phys_addr = rte_pktmbuf_mtophys(m);
> >  	op->sym->cipher.iv.length = AES_CBC_CIPHER_IV_LENGTH;
> >
> > +	rte_memcpy(op->sym->cipher.iv.data, aes_cbc_iv,
> > +			AES_CBC_CIPHER_IV_LENGTH);
> > +
> >  	/* Data lengths/offsets Parameters */
> >  	op->sym->auth.data.offset = 0;
> >  	op->sym->auth.data.length = data_len; @@ -2468,7 +2472,9 @@ 
> > test_perf_aes_sha(uint8_t dev_id, uint16_t queue_id,
> >  				rte_pktmbuf_free(mbufs[k]);
> >  			return -1;
> >  		}
> > -
> > +		/* Make room for Digest and IV in mbuf */
> > +		rte_pktmbuf_append(mbufs[i], digest_length);
> > +		rte_pktmbuf_prepend(mbufs[i],
> AES_CBC_CIPHER_IV_LENGTH);
> >  	}
> >
> >
> >
> Hi Declan,
> 
> Sorry I missed out copy your name in the TO list. Do we have some 
> comments on this patch.
> 
> Regards,
> Akhil

  reply	other threads:[~2016-10-07 11:32 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-26 16:32 [dpdk-dev] [PATCH] examples/ipsec-secgw: Update checksum while decrementing ttl akhil.goyal
2016-09-26 13:28 ` Sergio Gonzalez Monroy
2016-10-05  0:34   ` De Lara Guarch, Pablo
2016-10-05  6:32     ` Akhil Goyal
2016-10-07 20:53       ` De Lara Guarch, Pablo
2016-10-10 12:05         ` Sergio Gonzalez Monroy
2016-10-17 17:05           ` De Lara Guarch, Pablo
2016-10-19  8:38             ` Akhil Goyal
2016-10-26  2:29               ` De Lara Guarch, Pablo
2016-09-26 16:32 ` [dpdk-dev] [PATCH] app/test: Remove hard coding for nb_queue_pairs in test_cryptodev akhil.goyal
2016-09-26 19:36   ` De Lara Guarch, Pablo
2016-09-29 14:12     ` Trahe, Fiona
2016-09-29 14:25       ` Thomas Monjalon
2016-09-29 14:29         ` De Lara Guarch, Pablo
2016-09-26 16:33 ` [dpdk-dev] [PATCH] test_cryptodev_perf: IV and digest should be stored at a DMAeble address akhil.goyal
2016-10-05  6:40   ` Akhil Goyal
2016-10-05  9:26     ` Kusztal, ArkadiuszX
2016-10-07 11:32       ` Akhil Goyal [this message]
2016-10-07 17:06   ` [dpdk-dev] [PATCH v2] " akhil.goyal
2016-10-07 21:36     ` De Lara Guarch, Pablo
2016-10-10  5:22       ` Akhil Goyal
2016-10-10 16:24         ` De Lara Guarch, Pablo
     [not found]     ` <20161012111629.14126-1-akhil.goyal@nxp.com>
2016-10-12 18:26       ` [dpdk-dev] [PATCH v3] " Trahe, Fiona
2016-10-13 19:35         ` De Lara Guarch, Pablo
2016-09-29 17:18 ` [dpdk-dev] [PATCH v2] app/test: remove hard-coding of crypto num qps Fiona Trahe
2016-10-05  0:49   ` De Lara Guarch, Pablo
2016-10-06 14:55     ` Trahe, Fiona
2016-10-06 17:34 ` [dpdk-dev] [PATCH v3 0/4] remove hard-coding of crypto num qps and cleanup Fiona Trahe
2016-10-07  0:29   ` De Lara Guarch, Pablo
2016-10-07  0:57     ` De Lara Guarch, Pablo
2016-10-06 17:34 ` [dpdk-dev] [PATCH v3 1/4] crypto/aesni_mb: free ring memory on qp release in PMD Fiona Trahe
2016-10-06 17:34 ` [dpdk-dev] [PATCH v3 2/4] app/test: remove pointless for loop Fiona Trahe
2016-10-06 17:34 ` [dpdk-dev] [PATCH v3 3/4] app/test: cleanup unnecessary ring size setup Fiona Trahe
2016-10-06 17:34 ` [dpdk-dev] [PATCH v3 4/4] app/test: remove hard-coding of crypto num qps Fiona Trahe

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