From: Raslan Darawsheh <rasland@mellanox.com>
To: Jack Min <jackmin@mellanox.com>, Matan Azrad <matan@mellanox.com>,
Shahaf Shuler <shahafs@mellanox.com>,
Slava Ovsiienko <viacheslavo@mellanox.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>, Ori Kam <orika@mellanox.com>
Subject: Re: [dpdk-dev] [PATCH] net/mlx5: fix layer bits not unique
Date: Wed, 13 Nov 2019 12:39:29 +0000 [thread overview]
Message-ID: <DB3PR0502MB3964FE02C154F5A10C2BC106C2760@DB3PR0502MB3964.eurprd05.prod.outlook.com> (raw)
In-Reply-To: <f37006e05e628fa21f3db3f85eb684039ba00325.1573636905.git.jackmin@mellanox.com>
Hi,
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Xiaoyu Min
> Sent: Wednesday, November 13, 2019 11:30 AM
> To: Matan Azrad <matan@mellanox.com>; Shahaf Shuler
> <shahafs@mellanox.com>; Slava Ovsiienko <viacheslavo@mellanox.com>
> Cc: dev@dpdk.org; Ori Kam <orika@mellanox.com>
> Subject: [dpdk-dev] [PATCH] net/mlx5: fix layer bits not unique
>
> The layer bits should be unique otherwise layer info will be
> interpreted wrongly.
>
> Fixes: 70d84dc797b7 ("net/mlx5: add internal tag item and action")
> Cc: orika@mellanox.com
>
> Fixes: 55deee1715f0 ("net/mlx5: extend flow mark support")
> Cc: viacheslavo@mellanox.com
>
> Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
> ---
> drivers/net/mlx5/mlx5_flow.h | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
> index 998da61490..3fff5dd7da 100644
> --- a/drivers/net/mlx5/mlx5_flow.h
> +++ b/drivers/net/mlx5/mlx5_flow.h
> @@ -109,18 +109,18 @@ enum mlx5_feature_name {
> #define MLX5_FLOW_ITEM_MARK (1u << 19)
>
> /* Pattern MISC bits. */
> -#define MLX5_FLOW_LAYER_ICMP (1u << 19)
> -#define MLX5_FLOW_LAYER_ICMP6 (1u << 20)
> -#define MLX5_FLOW_LAYER_GRE_KEY (1u << 21)
> +#define MLX5_FLOW_LAYER_ICMP (1u << 20)
> +#define MLX5_FLOW_LAYER_ICMP6 (1u << 21)
> +#define MLX5_FLOW_LAYER_GRE_KEY (1u << 22)
>
> /* Pattern tunnel Layer bits (continued). */
> -#define MLX5_FLOW_LAYER_IPIP (1u << 21)
> -#define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 22)
> -#define MLX5_FLOW_LAYER_NVGRE (1u << 23)
> -#define MLX5_FLOW_LAYER_GENEVE (1u << 24)
> +#define MLX5_FLOW_LAYER_IPIP (1u << 23)
> +#define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 24)
> +#define MLX5_FLOW_LAYER_NVGRE (1u << 25)
> +#define MLX5_FLOW_LAYER_GENEVE (1u << 26)
>
> /* Queue items. */
> -#define MLX5_FLOW_ITEM_TX_QUEUE (1u << 25)
> +#define MLX5_FLOW_ITEM_TX_QUEUE (1u << 27)
>
> /* Outer Masks. */
> #define MLX5_FLOW_LAYER_OUTER_L3 \
> --
> 2.24.0.rc0.3.g12a4aeaad8
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
prev parent reply other threads:[~2019-11-13 12:39 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-13 9:29 Xiaoyu Min
2019-11-13 10:05 ` Slava Ovsiienko
2019-11-13 12:39 ` Raslan Darawsheh [this message]
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