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From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
To: Slava Ovsiienko <viacheslavo@nvidia.com>,
	"dev@dpdk.org" <dev@dpdk.org>,
	Ruifeng Wang <Ruifeng.Wang@arm.com>,
	Matan Azrad <matan@nvidia.com>,
	Shahaf Shuler <shahafs@nvidia.com>
Cc: nd <nd@arm.com>, Matan Azrad <matan@nvidia.com>,
	"stable@dpdk.org" <stable@dpdk.org>, nd <nd@arm.com>
Subject: RE: [PATCH v2] net/mlx5: use just sufficient barrier for Arm platforms
Date: Tue, 27 Sep 2022 21:06:41 +0000	[thread overview]
Message-ID: <DBAPR08MB58147EAF85DA53518029A8C398559@DBAPR08MB5814.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <DM6PR12MB3753151949403B094C1506B3DF559@DM6PR12MB3753.namprd12.prod.outlook.com>

<snip>

> 
> Hi, Honnappa
> 
> We discussed the barrier here:
> http://patches.dpdk.org/project/dpdk/patch/20210606164948.35997-1-
> honnappa.nagarahalli@arm.com/
> 
> (BTW, it is good practice to keep the reference to previous patch versions
> below Commit Message of the next ones).
Apologies, I did not understand this. I would like to fix this if I can understand it better.

> 
> This barrier is not about compiler ordering, it is about external HW agent
> memory action completions.
> So, I'm not sure the rte_atomic_thread_fence() is safe for x86 - patch impacts
> x86 as well.
> 
> With best regards,
> Slava
> 
> > -----Original Message-----
> > From: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> > Sent: Tuesday, August 30, 2022 23:01
> > To: dev@dpdk.org; honnappa.nagarahalli@arm.com;
> ruifeng.wang@arm.com;
> > Matan Azrad <matan@nvidia.com>; Shahaf Shuler <shahafs@nvidia.com>;
> > Slava Ovsiienko <viacheslavo@nvidia.com>
> > Cc: nd@arm.com; Matan Azrad <matan@nvidia.com>; stable@dpdk.org
> > Subject: [PATCH v2] net/mlx5: use just sufficient barrier for Arm
> > platforms
> >
> > cqe->op_own indicates if the CQE is owned by the NIC. The rest of
> > the fields in CQE should be read only after op_own is read. On Arm
> > platforms using "dmb ishld" is sufficient to enforce this.
> >
> > Fixes: 88c0733535d6 ("net/mlx5: extend Rx completion with error
> > handling")
> > Cc: matan@mellanox.com
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> > Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> > ---
> >  drivers/common/mlx5/mlx5_common.h | 6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/common/mlx5/mlx5_common.h
> > b/drivers/common/mlx5/mlx5_common.h
> > index 5028a05b49..ac2e85b15f 100644
> > --- a/drivers/common/mlx5/mlx5_common.h
> > +++ b/drivers/common/mlx5/mlx5_common.h
> > @@ -195,7 +195,11 @@ check_cqe(volatile struct mlx5_cqe *cqe, const
> > uint16_t cqes_n,
> >
> >  	if (unlikely((op_owner != (!!(idx))) || (op_code ==
> > MLX5_CQE_INVALID)))
> >  		return MLX5_CQE_STATUS_HW_OWN;
> > -	rte_io_rmb();
> > +	/* Prevent speculative reading of other fields in CQE until
> > +	 * CQE is valid.
> > +	 */
> > +	rte_atomic_thread_fence(__ATOMIC_ACQUIRE);
> > +
> >  	if (unlikely(op_code == MLX5_CQE_RESP_ERR ||
> >  		     op_code == MLX5_CQE_REQ_ERR))
> >  		return MLX5_CQE_STATUS_ERR;
> > --
> > 2.17.1


  parent reply	other threads:[~2022-09-27 21:06 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-06 16:49 [dpdk-stable] [PATCH] net/mlx5: remove unwanted barrier Honnappa Nagarahalli
2021-07-01 12:52 ` Slava Ovsiienko
2021-07-02 21:51   ` Honnappa Nagarahalli
2022-08-30 20:00 ` [PATCH v2] net/mlx5: use just sufficient barrier for Arm platforms Honnappa Nagarahalli
2022-09-27  6:34   ` Slava Ovsiienko
2022-09-27 21:03     ` Honnappa Nagarahalli
2022-11-15  1:45       ` Honnappa Nagarahalli
2023-03-07 16:07         ` Slava Ovsiienko
2023-03-09  2:42           ` Honnappa Nagarahalli
2022-09-27 21:06     ` Honnappa Nagarahalli [this message]
2023-03-09  2:32   ` [PATCH v3] net/mlx5: use just sufficient barrier for ARM platforms Honnappa Nagarahalli
2023-03-09 15:44     ` Slava Ovsiienko
2023-03-19 13:32     ` Raslan Darawsheh

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