From: "Zhang, Qi Z" <qi.z.zhang@intel.com>
To: Thomas Monjalon <thomas@monjalon.net>
Cc: "Yang, Qiming" <qiming.yang@intel.com>,
"Zeng, ZhichaoX" <zhichaox.zeng@intel.com>,
"dev@dpdk.org" <dev@dpdk.org>,
"orika@nvidia.com" <orika@nvidia.com>,
"Marchand, David" <david.marchand@redhat.com>,
"Mcnamara, John" <john.mcnamara@intel.com>,
Ferruh Yigit <ferruh.yigit@amd.com>
Subject: RE: [PATCH v5 5/5] doc: add generic flow doc for ice PMD
Date: Thu, 26 Oct 2023 10:43:52 +0000 [thread overview]
Message-ID: <DM4PR11MB59948CBF7810FB1AE0209AD9D7DDA@DM4PR11MB5994.namprd11.prod.outlook.com> (raw)
In-Reply-To: <1730069.QkHrqEjB74@thomas>
Sorry for late response... comment inline
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Friday, October 13, 2023 9:17 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: Yang, Qiming <qiming.yang@intel.com>; Zeng, ZhichaoX
> <zhichaox.zeng@intel.com>; dev@dpdk.org; orika@nvidia.com;
> david.marchand@redhat.com; Mcnamara, John
> <john.mcnamara@intel.com>
> Subject: Re: [PATCH v5 5/5] doc: add generic flow doc for ice PMD
>
> 26/09/2023 13:29, Qi Zhang:
> > +Generic Flow Support
> > +~~~~~~~~~~~~~~~~~~~~
> > +
> > +The ice PMD provides support for the Generic Flow API (RTE_FLOW),
> > +enabling users to offload various flow classification tasks to the E810 NIC.
> > +The E810 NIC's packet processing pipeline consists of the following stages:
> > +
> > +Switch: Supports exact match and limited wildcard matching with a
> > +large flow capacity.
> > +
> > +ACL: Supports wildcard matching with a smaller flow capacity (DCF mode
> only).
> > +
> > +FDIR: Supports exact match with a large flow capacity (PF mode only).
> > +
> > +Hash: Supports RSS (PF mode only)
> > +
> > +The ice PMD utilizes the ice_flow_engine structure to represent each
> > +of these stages and leverages the rte_flow rule's ``group`` attribute
> > +for selecting the appropriate engine for Switch, ACL, and FDIR operations:
> > +
> > +Group 0 maps to Switch
> > +Group 1 maps to ACL
> > +Group 2 maps to FDIR
> > +
> > +In the case of RSS, it will only be selected if a
> > +``RTE_FLOW_ACTION_RSS`` action is targeted to no queue group, and the
> group attribute is ignored.
> > +
> > +For each engine, a list of supported patterns is maintained in a
> > +global array named ``ice_<engine>_supported_pattern``. The Ice PMD
> > +will reject any rule with a pattern that is not included in the supported list.
>
> Why not choosing the right engine automatically?
>
> You are defining an API (group number specialization) which is specific to this
> driver.
OK, let me know if my understanding is correct or not.
I think the implementation somehow broken below description in rte_flow document.
"Groups are not linked by default, so the logical hierarchy of groups must be explicitly defined by flow rules themselves in each group using the JUMP action to define the next group to redirect to. "
Could a fix like below works ? Or any better suggestion?
1. Initially, map the switch to group 0, as it represents the first stage in the hardware pipeline.
2. For ACL usage, users should create a rule in group 0 with a JUMP action that includes an arbitrarily group ID. then, the driver will associate this group with ACL engine.
3. For FDIR usage, users should create a rule within group <ACL> with a JUMP action, utilizing a distinct group ID. then, the driver will link this group with FDIR engine.
Thanks
Qi
> Don't you care about portability of DPDK applications?
>
prev parent reply other threads:[~2023-10-26 10:44 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-14 20:26 [PATCH 0/2] refactor rte_flow Qi Zhang
2023-08-14 20:26 ` [PATCH 1/2] net/ice: remove pipeline mode Qi Zhang
2023-08-14 20:26 ` [PATCH 2/2] net/ice: map group to pipeline stage Qi Zhang
2023-09-11 16:51 ` [PATCH v2 0/2] refactor rte_flow Qi Zhang
2023-09-11 16:51 ` [PATCH v2 1/2] net/ice: remove pipeline mode Qi Zhang
2023-09-11 16:51 ` [PATCH v2 2/2] net/ice: map group to pipeline stage Qi Zhang
2023-09-12 10:00 ` [PATCH v3 0/5] refactor rte_flow Qi Zhang
2023-09-12 10:00 ` [PATCH v3 1/5] net/ice: remove pipeline mode Qi Zhang
2023-09-12 10:00 ` [PATCH v3 2/5] net/ice: refine flow engine disabling Qi Zhang
2023-09-12 10:00 ` [PATCH v3 3/5] net/ice: map group to pipeline stage Qi Zhang
2023-09-12 10:00 ` [PATCH v3 4/5] net/ice: refine supported flow pattern name Qi Zhang
2023-09-12 10:00 ` [PATCH v3 5/5] doc: add generic flow doc for ice PMD Qi Zhang
2023-09-25 10:33 ` [PATCH v4 0/5] net/ice: refactor rte_flow Qi Zhang
2023-09-25 10:33 ` [PATCH v4 1/5] net/ice: remove pipeline mode Qi Zhang
2023-09-25 10:33 ` [PATCH v4 2/5] net/ice: refine flow engine disabling Qi Zhang
2023-09-25 10:33 ` [PATCH v4 3/5] net/ice: map group to pipeline stage Qi Zhang
2023-09-25 10:33 ` [PATCH v4 4/5] net/ice: refine supported flow pattern name Qi Zhang
2023-09-25 10:33 ` [PATCH v4 5/5] doc: add generic flow doc for ice PMD Qi Zhang
2023-09-26 11:29 ` [PATCH v5 0/5] net/ice: refactor rte_flow Qi Zhang
2023-09-26 11:29 ` [PATCH v5 1/5] net/ice: remove pipeline mode Qi Zhang
2023-09-26 11:29 ` [PATCH v5 2/5] net/ice: refine flow engine disabling Qi Zhang
2023-09-26 11:29 ` [PATCH v5 3/5] net/ice: map group to pipeline stage Qi Zhang
2023-09-26 11:29 ` [PATCH v5 4/5] net/ice: refine supported flow pattern name Qi Zhang
2023-09-26 11:29 ` [PATCH v5 5/5] doc: add generic flow doc for ice PMD Qi Zhang
2023-09-27 2:42 ` Zeng, ZhichaoX
2023-09-27 3:08 ` Zhang, Qi Z
2023-10-13 13:17 ` Thomas Monjalon
2023-10-26 10:43 ` Zhang, Qi Z [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=DM4PR11MB59948CBF7810FB1AE0209AD9D7DDA@DM4PR11MB5994.namprd11.prod.outlook.com \
--to=qi.z.zhang@intel.com \
--cc=david.marchand@redhat.com \
--cc=dev@dpdk.org \
--cc=ferruh.yigit@amd.com \
--cc=john.mcnamara@intel.com \
--cc=orika@nvidia.com \
--cc=qiming.yang@intel.com \
--cc=thomas@monjalon.net \
--cc=zhichaox.zeng@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).