From: "Wu, Jingjing" <jingjing.wu@intel.com>
To: "Guo, Junfeng" <junfeng.guo@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: RE: [PATCH v2] raw/ntb: add PPD status check for SPR
Date: Fri, 1 Jul 2022 09:38:27 +0000 [thread overview]
Message-ID: <DM6PR11MB45784E64BBB2621ACC2D4272E3BD9@DM6PR11MB4578.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20220630085616.183562-1-junfeng.guo@intel.com>
> -----Original Message-----
> From: Guo, Junfeng <junfeng.guo@intel.com>
> Sent: Thursday, June 30, 2022 4:56 PM
> To: Wu, Jingjing <jingjing.wu@intel.com>
> Cc: dev@dpdk.org; Guo, Junfeng <junfeng.guo@intel.com>
> Subject: [PATCH v2] raw/ntb: add PPD status check for SPR
>
> Add PPD (PCIe Port Definition) status check for SPR (Sapphire Rapids).
>
> Note that NTB on SPR has the same device id with that on ICX, while
> the field offsets of PPD Control Register are different. Here, we use
> the PCI device revision id to distinguish the HW platform (ICX/SPR)
> and check the Port Config Status and Port Definition accordingly.
>
> +---------------------------+--------------------+--------------------+
> | Fields | Bit Range (on ICX) | Bit Range (on SPR) |
> +---------------------------+--------------------+--------------------+
> | Port Configuration Status | 12 | 14 |
> | Port Definition | 9:8 | 10:8 |
> +---------------------------+--------------------+--------------------+
>
> v2:
> fix revision id value check logic.
>
> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
next prev parent reply other threads:[~2022-07-01 9:38 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-30 8:39 [PATCH] " Junfeng Guo
2022-06-30 8:56 ` [PATCH v2] " Junfeng Guo
2022-07-01 9:38 ` Wu, Jingjing [this message]
2022-07-05 19:56 ` Thomas Monjalon
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