From: Dariusz Sosnowski <dsosnowski@nvidia.com>
To: Wathsala Vithanage <wathsala.vithanage@arm.com>,
"NBU-Contact-Thomas Monjalon (EXTERNAL)" <thomas@monjalon.net>,
Slava Ovsiienko <viacheslavo@nvidia.com>,
Ori Kam <orika@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>,
Matan Azrad <matan@nvidia.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>, "nd@arm.com" <nd@arm.com>,
Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Subject: RE: [PATCH] net/mlx5: enable PCI related counters
Date: Tue, 13 Feb 2024 16:17:20 +0000 [thread overview]
Message-ID: <IA1PR12MB83116569462383696BBCE15BA44F2@IA1PR12MB8311.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20240209204142.1148790-1-wathsala.vithanage@arm.com>
> -----Original Message-----
> From: Wathsala Vithanage <wathsala.vithanage@arm.com>
> Sent: Friday, February 9, 2024 21:42
> To: NBU-Contact-Thomas Monjalon (EXTERNAL) <thomas@monjalon.net>;
> Dariusz Sosnowski <dsosnowski@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Ori Kam <orika@nvidia.com>; Suanming Mou
> <suanmingm@nvidia.com>; Matan Azrad <matan@nvidia.com>
> Cc: dev@dpdk.org; nd@arm.com; Wathsala Vithanage
> <wathsala.vithanage@arm.com>; Honnappa Nagarahalli
> <honnappa.nagarahalli@arm.com>
> Subject: [PATCH] net/mlx5: enable PCI related counters
>
> Versions of Mellanox NICs starting from CX5 have device counters related to
> PCI. These counters are helpful in debugging IO bottlenecks. For instance, the
> outbound_pci_stalled_rd and outbound_pci_stalled_wr counters can help
> with identifying NIC stalls due to insufficient PCI credits, which otherwise
> would have required a PCI analyzer or a sophisticated PCI root port with a
> PMU.
> Currently none of these are available in the MLX5 PMD even though ethtool is
> capable of reading some of them.
> Since PMD uses the same ioctl used by ethtool (SIOCETHTOOL) and reads via
> the kernel driver it is possible to add support with ease.
> There is one more PCI related counter and a device counter that aren't
> implemented in the Linux driver at the moment. These two are named
> outbound_pci_buffer_overflow and dev_out_of_buffer respectively. As per
> Nvidia's documentation these two counters can tell the number of packets
> dropped due to pci buffer overflow and the number of times the device
> owned queue had not enough buffers allocated.
>
> Signed-off-by: Wathsala Vithanage <wathsala.vithanage@arm.com>
> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Best regards,
Dariusz Sosnowski
next prev parent reply other threads:[~2024-02-13 16:17 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-09 20:41 Wathsala Vithanage
2024-02-09 21:16 ` Honnappa Nagarahalli
2024-02-10 1:32 ` Stephen Hemminger
2024-02-13 16:13 ` Dariusz Sosnowski
2024-02-14 0:52 ` Honnappa Nagarahalli
2024-02-13 13:12 ` Slava Ovsiienko
2024-02-14 1:50 ` Honnappa Nagarahalli
2024-02-13 16:17 ` Dariusz Sosnowski [this message]
2024-02-14 20:14 ` [PATCH v2] " Wathsala Vithanage
2024-02-15 18:26 ` [PATCH v3] " Wathsala Vithanage
2024-02-27 16:14 ` Raslan Darawsheh
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