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From: Slava Ovsiienko <viacheslavo@nvidia.com>
To: NBU-Contact-Thomas Monjalon <thomas@monjalon.net>,
	"dev@dpdk.org" <dev@dpdk.org>
Cc: "ferruh.yigit@intel.com" <ferruh.yigit@intel.com>,
	"david.marchand@redhat.com" <david.marchand@redhat.com>,
	"bruce.richardson@intel.com" <bruce.richardson@intel.com>,
	"olivier.matz@6wind.com" <olivier.matz@6wind.com>,
	"andrew.rybchenko@oktetlabs.ru" <andrew.rybchenko@oktetlabs.ru>,
	"jerinj@marvell.com" <jerinj@marvell.com>,
	"stable@dpdk.org" <stable@dpdk.org>,
	Matan Azrad <matan@nvidia.com>,
	Shahaf Shuler <shahafs@nvidia.com>, Ori Kam <orika@mellanox.com>
Subject: Re: [dpdk-stable] [PATCH v3 06/16] net/mlx5: fix dynamic mbuf offset lookup check
Date: Tue, 3 Nov 2020 08:12:51 +0000	[thread overview]
Message-ID: <MWHPR12MB15019C3EE1F90BF5764AAD46DF110@MWHPR12MB1501.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20201103001407.2931963-7-thomas@monjalon.net>

> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Tuesday, November 3, 2020 2:14
> To: dev@dpdk.org
> Cc: ferruh.yigit@intel.com; david.marchand@redhat.com;
> bruce.richardson@intel.com; olivier.matz@6wind.com;
> andrew.rybchenko@oktetlabs.ru; jerinj@marvell.com; Slava Ovsiienko
> <viacheslavo@nvidia.com>; stable@dpdk.org; Matan Azrad
> <matan@nvidia.com>; Shahaf Shuler <shahafs@nvidia.com>; Ori Kam
> <orika@mellanox.com>
> Subject: [PATCH v3 06/16] net/mlx5: fix dynamic mbuf offset lookup check
> 
> The functions rte_mbuf_dynfield_lookup() and rte_mbuf_dynflag_lookup() can
> return an offset starting with 0 or a negative error code.
> 
> In reality the first offsets are probably reserved forever, but for the sake of
> strict API compliance, the checks which considered 0 as an error are fixed.
> 
> Fixes: efa79e68c8cd ("net/mlx5: support fine grain dynamic flag")
> Fixes: 3172c471b86f ("net/mlx5: prepare Tx queue structures to support
> timestamp")
> Fixes: 0febfcce3693 ("net/mlx5: prepare Tx to support scheduling")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

> ---
>  drivers/net/mlx5/mlx5_rxtx.c    | 4 ++--
>  drivers/net/mlx5/mlx5_trigger.c | 2 +-
>  drivers/net/mlx5/mlx5_txq.c     | 2 +-
>  3 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index
> b530ff421f..e86468b67a 100644
> --- a/drivers/net/mlx5/mlx5_rxtx.c
> +++ b/drivers/net/mlx5/mlx5_rxtx.c
> @@ -5661,9 +5661,9 @@ mlx5_select_tx_function(struct rte_eth_dev *dev)
>  	}
>  	if (tx_offloads & DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP &&
>  	    rte_mbuf_dynflag_lookup
> -			(RTE_MBUF_DYNFLAG_TX_TIMESTAMP_NAME, NULL)
> > 0 &&
> +			(RTE_MBUF_DYNFLAG_TX_TIMESTAMP_NAME, NULL)
> >= 0 &&
>  	    rte_mbuf_dynfield_lookup
> -			(RTE_MBUF_DYNFIELD_TIMESTAMP_NAME, NULL) >
> 0) {
> +			(RTE_MBUF_DYNFIELD_TIMESTAMP_NAME, NULL) >=
> 0) {
>  		/* Offload configured, dynamic entities registered. */
>  		olx |= MLX5_TXOFF_CONFIG_TXPP;
>  	}
> diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c
> index 7735f022a3..917b433c4a 100644
> --- a/drivers/net/mlx5/mlx5_trigger.c
> +++ b/drivers/net/mlx5/mlx5_trigger.c
> @@ -302,7 +302,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)
>  	DRV_LOG(DEBUG, "port %u starting device", dev->data->port_id);
>  	fine_inline = rte_mbuf_dynflag_lookup
>  		(RTE_PMD_MLX5_FINE_GRANULARITY_INLINE, NULL);
> -	if (fine_inline > 0)
> +	if (fine_inline >= 0)
>  		rte_net_mlx5_dynf_inline_mask = 1UL << fine_inline;
>  	else
>  		rte_net_mlx5_dynf_inline_mask = 0;
> diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index
> af84f5f72b..8ed2bcff7b 100644
> --- a/drivers/net/mlx5/mlx5_txq.c
> +++ b/drivers/net/mlx5/mlx5_txq.c
> @@ -1305,7 +1305,7 @@ mlx5_txq_dynf_timestamp_set(struct rte_eth_dev
> *dev)
> 
> 	(RTE_MBUF_DYNFLAG_TX_TIMESTAMP_NAME, NULL);
>  	off = rte_mbuf_dynfield_lookup
>  				(RTE_MBUF_DYNFIELD_TIMESTAMP_NAME,
> NULL);
> -	if (nbit > 0 && off >= 0 && sh->txpp.refcnt)
> +	if (nbit >= 0 && off >= 0 && sh->txpp.refcnt)
>  		mask = 1ULL << nbit;
>  	for (i = 0; i != priv->txqs_n; ++i) {
>  		data = (*priv->txqs)[i];
> --
> 2.28.0


  reply	other threads:[~2020-11-03  8:13 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20201029092751.3837177-1-thomas@monjalon.net>
2020-10-29  9:27 ` [dpdk-stable] [PATCH 07/15] " Thomas Monjalon
     [not found] ` <20201101180626.2198868-1-thomas@monjalon.net>
2020-11-01 18:06   ` [dpdk-stable] [PATCH v2 07/14] " Thomas Monjalon
     [not found] ` <20201103001407.2931963-1-thomas@monjalon.net>
2020-11-03  0:13   ` [dpdk-stable] [PATCH v3 06/16] " Thomas Monjalon
2020-11-03  8:12     ` Slava Ovsiienko [this message]
     [not found] ` <20201103122205.183472-1-thomas@monjalon.net>
2020-11-03 12:21   ` [dpdk-stable] [PATCH v4 " Thomas Monjalon
     [not found] ` <20201103140931.488700-1-thomas@monjalon.net>
2020-11-03 14:09   ` [dpdk-stable] [PATCH v5 " Thomas Monjalon

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