From: Hemant Agrawal <hemant.agrawal@nxp.com>
To: "Gujjar, Abhinandan S" <abhinandan.gujjar@intel.com>,
"dev@dpdk.org" <dev@dpdk.org>
Cc: "jerinj@marvell.com" <jerinj@marvell.com>
Subject: Re: [dpdk-dev] [PATCH 1/6] test/event_crypto: fix missing IV value for AES algo
Date: Fri, 18 Oct 2019 05:28:25 +0000 [thread overview]
Message-ID: <VI1PR0401MB25410B4091EC7D3F8B164CAD896C0@VI1PR0401MB2541.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <5612CB344B05EE4F95FC5B729939F7807954E11C@PGSMSX102.gar.corp.intel.com>
Hi Abhinandan,
> -----Original Message-----
> From: Gujjar, Abhinandan S <abhinandan.gujjar@intel.com>
> Sent: Friday, October 4, 2019 3:06 PM
> To: Hemant Agrawal <hemant.agrawal@nxp.com>; dev@dpdk.org
> Cc: jerinj@marvell.com
> Subject: RE: [PATCH 1/6] test/event_crypto: fix missing IV value for AES algo
> Importance: High
>
> Hi Hemanth,
>
> I tried to test the series of patches on test with SW adapter.
> Looks like, test hangs after 3rd case!
> Not sure, if I am missing any params to be passed to the app or anything else
> has to be done.
[Hemant] OK, let me split this series into 2.
I will send the restructuring patch separately post rework. Most likely that patch is causing hang on x86.
>
> + ------------------------------------------------------- +
> + TestCase [ 0] : test_crypto_adapter_create succeeded + TestCase [ 1] :
> test_crypto_adapter_qp_add_del succeeded +-----------------------------------
> -------------------+
> + Crypto adapter stats for instance 0:
> + Event port poll count 0
> + Event dequeue count 0
> + Cryptodev enqueue count 0
> + Cryptodev enqueue failed count 0
> + Cryptodev dequeue count 0
> + Event enqueue count 0
> + Event enqueue retry count 0
> + Event enqueue fail count 0
> +------------------------------------------------------+
> + TestCase [ 2] : test_crypto_adapter_stats succeeded
>
>
> > -----Original Message-----
> > From: Hemant Agrawal <hemant.agrawal@nxp.com>
> > Sent: Tuesday, October 1, 2019 5:04 PM
> > To: dev@dpdk.org
> > Cc: jerinj@marvell.com; Gujjar, Abhinandan S
> > <abhinandan.gujjar@intel.com>
> > Subject: [PATCH 1/6] test/event_crypto: fix missing IV value for AES
> > algo
> >
> > The IV was not set, which was causing HW based SEC on DPAA1 to fail.
> >
> > Fixes: ce02103ad072 ("test/event_crypto: change the SEC cipher algo")
> >
> > Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> > ---
> > Please squash if possible.
> >
> > app/test/test_event_crypto_adapter.c | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/app/test/test_event_crypto_adapter.c
> > b/app/test/test_event_crypto_adapter.c
> > index 652e458f0..bf83a6357 100644
> > --- a/app/test/test_event_crypto_adapter.c
> > +++ b/app/test/test_event_crypto_adapter.c
> > @@ -171,6 +171,7 @@ test_op_forward_mode(uint8_t session_less)
> > struct rte_event ev;
> > uint32_t cap;
> > int ret;
> > + uint8_t cipher_key[17];
> >
> > memset(&m_data, 0, sizeof(m_data));
> >
> > @@ -186,6 +187,11 @@ test_op_forward_mode(uint8_t session_less)
> > cipher_xform.cipher.algo = RTE_CRYPTO_CIPHER_AES_CBC;
> > cipher_xform.cipher.op = RTE_CRYPTO_CIPHER_OP_ENCRYPT;
> >
> > + cipher_xform.cipher.key.data = cipher_key;
> > + cipher_xform.cipher.key.length = 16;
> > + cipher_xform.cipher.iv.offset = IV_OFFSET;
> > + cipher_xform.cipher.iv.length = 16;
> > +
> > op = rte_crypto_op_alloc(params.op_mpool,
> > RTE_CRYPTO_OP_TYPE_SYMMETRIC);
> > TEST_ASSERT_NOT_NULL(op,
> > @@ -364,6 +370,7 @@ test_op_new_mode(uint8_t session_less)
> > struct rte_mbuf *m;
> > uint32_t cap;
> > int ret;
> > + uint8_t cipher_key[17];
> >
> > memset(&m_data, 0, sizeof(m_data));
> >
> > @@ -379,6 +386,11 @@ test_op_new_mode(uint8_t session_less)
> > cipher_xform.cipher.algo = RTE_CRYPTO_CIPHER_AES_CBC;
> > cipher_xform.cipher.op = RTE_CRYPTO_CIPHER_OP_ENCRYPT;
> >
> > + cipher_xform.cipher.key.data = cipher_key;
> > + cipher_xform.cipher.key.length = 16;
> > + cipher_xform.cipher.iv.offset = IV_OFFSET;
> > + cipher_xform.cipher.iv.length = 16;
> > +
> > op = rte_crypto_op_alloc(params.op_mpool,
> > RTE_CRYPTO_OP_TYPE_SYMMETRIC);
> > TEST_ASSERT_NOT_NULL(op, "Failed to allocate crypto_op!\n");
> > --
> > 2.17.1
next prev parent reply other threads:[~2019-10-18 5:28 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-01 11:33 Hemant Agrawal
2019-10-01 11:33 ` [dpdk-dev] [PATCH 2/6] test/event_crypto: fix check for HW support Hemant Agrawal
2019-10-01 11:33 ` [dpdk-dev] [PATCH 3/6] test/event_crypto: fix to avail the mempool entries Hemant Agrawal
2019-10-01 11:33 ` [dpdk-dev] [PATCH 4/6] test/event_crypto: support to release the atomic ctxt Hemant Agrawal
2019-10-01 11:33 ` [dpdk-dev] [PATCH 5/6] test/event_crypto: use device cap instead of fixed values Hemant Agrawal
2019-10-01 11:33 ` [dpdk-dev] [PATCH 6/6] test/event_crypto: separate the NEW and FWD mode inits Hemant Agrawal
2019-10-03 3:24 ` [dpdk-dev] [PATCH 1/6] test/event_crypto: fix missing IV value for AES algo Jerin Jacob
2019-10-03 4:52 ` Gujjar, Abhinandan S
2019-10-04 9:35 ` Gujjar, Abhinandan S
2019-10-16 8:01 ` Jerin Jacob
2019-10-18 5:28 ` Hemant Agrawal [this message]
2019-11-07 9:01 ` [dpdk-dev] [PATCH v2 1/3] " Hemant Agrawal
2019-11-07 9:01 ` [dpdk-dev] [PATCH v2 2/3] test/event_crypto: fix to avail the mempool entries Hemant Agrawal
2019-11-07 9:01 ` [dpdk-dev] [PATCH v2 3/3] test/event_crypto: fix check for HW support Hemant Agrawal
2019-11-18 15:59 ` [dpdk-dev] [PATCH v2 1/3] test/event_crypto: fix missing IV value for AES algo Jerin Jacob
2019-11-18 16:02 ` Gujjar, Abhinandan S
2019-11-19 10:36 ` Gujjar, Abhinandan S
2019-11-20 13:39 ` Jerin Jacob
2019-11-26 5:55 ` Jerin Jacob
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