From: Bruce Richardson <bruce.richardson@intel.com>
To: Tyler Retzlaff <roretzla@linux.microsoft.com>
Cc: <dev@dpdk.org>, Jasvinder Singh <jasvinder.singh@intel.com>,
"Konstantin Ananyev" <konstantin.v.ananyev@yandex.ru>
Subject: Re: [PATCH v2 2/2] net: stop using mmx intrinsics
Date: Thu, 28 Mar 2024 17:21:30 +0000 [thread overview]
Message-ID: <ZgWnGnYYhUHj77jR@bricha3-mobl1.ger.corp.intel.com> (raw)
In-Reply-To: <1711642446-6880-3-git-send-email-roretzla@linux.microsoft.com>
On Thu, Mar 28, 2024 at 09:14:06AM -0700, Tyler Retzlaff wrote:
> Update code to use only avx/sse intrinsics as mmx is not supported on
> MSVC.
>
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> ---
One comment inline below. With or without that suggestion:
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> lib/net/net_crc_avx512.c | 27 +++++++--------------------
> lib/net/net_crc_sse.c | 27 +++++++--------------------
> 2 files changed, 14 insertions(+), 40 deletions(-)
>
> diff --git a/lib/net/net_crc_avx512.c b/lib/net/net_crc_avx512.c
> index 0f0dee4..d18eb96 100644
> --- a/lib/net/net_crc_avx512.c
> +++ b/lib/net/net_crc_avx512.c
> @@ -5,11 +5,10 @@
> #include <stdalign.h>
>
> #include <rte_common.h>
> +#include <rte_vect.h>
>
> #include "net_crc.h"
>
> -#include <x86intrin.h>
> -
> /* VPCLMULQDQ CRC computation context structure */
> struct crc_vpclmulqdq_ctx {
> __m512i rk1_rk2;
> @@ -331,13 +330,10 @@ static const alignas(16) uint32_t mask2[4] = {
> c9, c10, c11);
> crc32_eth.fold_3x128b = _mm512_setr_epi64(c12, c13, c14, c15,
> c16, c17, 0, 0);
Since the setr's below are being replaced, it would be nice to change these
ones above too. Long term I think it's going to be confusing having some
assignments set up as L->R, while others are R->L.
> - crc32_eth.fold_1x128b = _mm_setr_epi64(_mm_cvtsi64_m64(c16),
> - _mm_cvtsi64_m64(c17));
> + crc32_eth.fold_1x128b = _mm_set_epi64x(c17, c16);
>
> - crc32_eth.rk5_rk6 = _mm_setr_epi64(_mm_cvtsi64_m64(c18),
> - _mm_cvtsi64_m64(c19));
> - crc32_eth.rk7_rk8 = _mm_setr_epi64(_mm_cvtsi64_m64(c20),
> - _mm_cvtsi64_m64(c21));
> + crc32_eth.rk5_rk6 = _mm_set_epi64x(c19, c18);
> + crc32_eth.rk7_rk8 = _mm_set_epi64x(c21, c20);
> }
<snip>
prev parent reply other threads:[~2024-03-28 17:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-20 21:12 [PATCH] " Tyler Retzlaff
2024-03-20 21:12 ` [PATCH] net: " Tyler Retzlaff
2024-03-21 17:09 ` Thomas Monjalon
2024-03-21 17:27 ` Tyler Retzlaff
2024-03-21 18:01 ` Thomas Monjalon
2024-03-21 18:18 ` Tyler Retzlaff
2024-03-28 16:16 ` Tyler Retzlaff
2024-03-28 16:14 ` [PATCH v2 0/2] " Tyler Retzlaff
2024-03-28 16:14 ` [PATCH v2 1/2] eal: include header for MSVC SIMD intrinsics Tyler Retzlaff
2024-03-28 17:19 ` Bruce Richardson
2024-03-28 16:14 ` [PATCH v2 2/2] net: stop using mmx intrinsics Tyler Retzlaff
2024-03-28 17:21 ` Bruce Richardson [this message]
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