From: Sagi Grimberg <sagi@grimberg.me>
To: Yongseok Koh <yskoh@mellanox.com>,
adrien.mazarguil@6wind.com, nelio.laranjeiro@6wind.com
Cc: dev@dpdk.org, stable@dpdk.org, Alexander Solganik <solganik@gmail.com>
Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH] net/mlx5: fix Tx doorbell memory barrier
Date: Sun, 22 Oct 2017 12:46:53 +0300 [thread overview]
Message-ID: <b8024ece-dba9-12e8-36b6-68bcccdeb05e@grimberg.me> (raw)
In-Reply-To: <20171022080022.13528-1-yskoh@mellanox.com>
> Configuring UAR as IO-mapped makes maximum throughput decline by noticeable
> amount. If UAR is configured as write-combining register, a write memory
> barrier is needed on ringing a doorbell. rte_wmb() is mostly effective when
> the size of a burst is comparatively small.
Personally I don't think that the flag is really a good interface
choice. But also I'm not convinced that its dependent on the burst size.
What guarantees that even for larger bursts the mmio write was flushed?
it comes after a set of writes that were flushed prior to the db update
and its not guaranteed that the application will immediately have more
data to trigger this writes to flush.
next prev parent reply other threads:[~2017-10-22 9:46 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-22 8:00 [dpdk-stable] " Yongseok Koh
2017-10-22 9:46 ` Sagi Grimberg [this message]
2017-10-22 22:01 ` [dpdk-stable] [dpdk-dev] " Yongseok Koh
2017-10-23 7:50 ` Nélio Laranjeiro
2017-10-23 17:24 ` Yongseok Koh
2017-10-24 6:49 ` Nélio Laranjeiro
2017-10-23 7:00 ` [dpdk-stable] " Nélio Laranjeiro
2017-10-25 0:27 ` [dpdk-stable] [PATCH v2] " Yongseok Koh
2017-10-25 9:19 ` Nélio Laranjeiro
2017-10-25 21:34 ` Ferruh Yigit
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