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From: Rami Rosen <ramirose@gmail.com>
Date: Fri, 4 Jan 2019 17:33:34 +0200
Message-ID: <CAHLOa7QtqgCLe7hEtFmdqFnpdF4UAy1O=rkKpy4rkb6Mzz6+4w@mail.gmail.com>
To: Jeremy Plsek <jplsek@iol.unh.edu>
Cc: ci@dpdk.org
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Subject: Re: [dpdk-ci] Question about performance test
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Hi Jeremy,


Thanks for your quick reply, it fully clarifies the query I had posted.

I do not see the actual results of the DTS perf test in the links you
posted, only percentage of degradation or improvement, unless I miss
something. I believe it can be helpful if the baseline of the actual
results will also be shown
to enable comparing to other vendors besides Intel and Mellanox.

Regards,
Rami Rosen





=D7=91=D7=AA=D7=90=D7=A8=D7=99=D7=9A =D7=99=D7=95=D7=9D =D7=95=D7=B3, 4 =D7=
=91=D7=99=D7=A0=D7=95=D7=B3 2019, 16:44, =D7=9E=D7=90=D7=AA Jeremy Plsek <j=
plsek@iol.unh.edu>:

> Hi Rami,
>
> I'm the current maintainer of the DPDK Performance CI. I realize that the
> performance results don't point to the website, so it's not obvious on
> where to find this information. You can find an overview of these tests
> here: https://lab.dpdk.org
>
> Most of this information can be either found on the detailed results of a
> test (such as https://lab.dpdk.org/results/dashboard/patchsets/4157/) or
> on the about page (https://lab.dpdk.org/results/dashboard/about/).
>
> But to answer your questions:
> At the moment, we only run performance tests. Specifically the
> nic_single_core_perf_test from the DPDK Test Suite with the TRex traffic
> generator.
> The devices we are testing are currently the Intel 82599ES 10G, the Intel
> XL710-QDA2 40G, the Mellanox ConnectX-5 100G, and the ConnectX-4 Lx 25G a=
nd
> 40G.
>
> We don't apply the doc folder when applying the series, in case a patch
> included code unrelated to documentation. If others in the group feel tha=
t
> it's still unnecessary to include "doc" labeled series, I can look into
> filtering them out.
>
> Thanks.
>
>
> On Fri, Jan 4, 2019 at 5:46 AM Rami Rosen <ramirose@gmail.com> wrote:
>
>> Hi,
>> I have a question about DPDK CI process and the tests done when a patch
>> is submitted to dpdk-dev mailing list.
>> In DPDK patch work I see these response messages from the DPDK CI for al=
l
>> patches:
>>
>> ...
>> ci/intel-Performance-Testing success Performance Testing PASS
>> ci/mellanox-Performance-Testing success Performance Testing PASS
>> ...
>>
>> My question is (I hope and believe the info is available publicly) :
>> which tests are run in the ci, generating these messages?  is it done wi=
th
>> IXIA and DTS ? (DPDK test suite, https://doc.dpdk.org/dts/gsg/) ? are
>> these l2fwd/l3fwd performance tests? or more than that ? and on which
>> Intel/Mellanox nics ?  Are these merely performance tests, or also
>> functional tests ?
>>
>> And BTW, I noticed that the CI runs a full performance cycle also for do=
c
>> patches (at least these messages are generated), which is a kind of
>> redundant (unless there is some filter which checks that if a patch only
>> affects modules under "doc", than such a cycle is not done but the messa=
ges
>> are still sent)
>>
>> Regards,
>> Rami Rosen
>>
>
>
> --
> Jeremy Plsek
> UNH InterOperability Laboratory
>
>

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Content-Type: text/html; charset="UTF-8"
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<div dir=3D"auto">Hi Jeremy,<div dir=3D"auto"><br></div><div dir=3D"auto"><=
div dir=3D"auto"><br></div><div dir=3D"auto">Thanks for your quick reply, i=
t fully clarifies the query I had posted.</div><div dir=3D"auto"><br></div>=
<div dir=3D"auto">I do not see the actual results of the DTS perf test in t=
he links you posted, only percentage of degradation or improvement, unless =
I miss something. I believe it can be helpful if the baseline of the actual=
 results will also be shown=C2=A0</div><div dir=3D"auto">to enable comparin=
g to other vendors besides Intel and Mellanox.</div><div dir=3D"auto"><br><=
/div><div dir=3D"auto">Regards,</div><div dir=3D"auto">Rami Rosen</div><div=
 dir=3D"auto"><br></div><div dir=3D"auto"><br></div><div dir=3D"auto"><br><=
/div></div><br><br><div class=3D"gmail_quote" dir=3D"auto"><div dir=3D"ltr"=
>=D7=91=D7=AA=D7=90=D7=A8=D7=99=D7=9A =D7=99=D7=95=D7=9D =D7=95=D7=B3, 4 =
=D7=91=D7=99=D7=A0=D7=95=D7=B3 2019, 16:44, =D7=9E=D7=90=D7=AA Jeremy Plsek=
 &lt;<a href=3D"mailto:jplsek@iol.unh.edu">jplsek@iol.unh.edu</a>&gt;:<br><=
/div><blockquote class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-le=
ft:1px #ccc solid;padding-left:1ex"><div dir=3D"ltr"><div dir=3D"ltr"><div =
dir=3D"ltr"><div dir=3D"ltr"><div dir=3D"ltr"><div dir=3D"ltr"><div dir=3D"=
ltr"><div dir=3D"ltr"><div dir=3D"ltr"><div dir=3D"ltr"><div>Hi Rami,</div>=
<div><br></div><div>I&#39;m the current maintainer of the DPDK Performance =
CI. I realize that the performance results don&#39;t point to the website, =
so it&#39;s not obvious on where to find this information. You can find an =
overview of these tests here: <a href=3D"https://lab.dpdk.org" target=3D"_b=
lank" rel=3D"noreferrer">https://lab.dpdk.org</a></div><div><br></div><div>=
Most of this information can be either found on the detailed results of a t=
est (such as <a href=3D"https://lab.dpdk.org/results/dashboard/patchsets/41=
57/" target=3D"_blank" rel=3D"noreferrer">https://lab.dpdk.org/results/dash=
board/patchsets/4157/</a>) or on the about page (<a href=3D"https://lab.dpd=
k.org/results/dashboard/about/" target=3D"_blank" rel=3D"noreferrer">https:=
//lab.dpdk.org/results/dashboard/about/</a>).</div><div><br></div><div>But =
to answer your questions:</div><div>At the moment, we only run performance =
tests. Specifically the nic_single_core_perf_test from the DPDK Test Suite =
with the TRex traffic generator.</div><div>The devices we are testing are c=
urrently the Intel 82599ES 10G, the Intel XL710-QDA2 40G, the Mellanox Conn=
ectX-5 100G, and the ConnectX-4 Lx 25G and 40G.</div><div><br></div><div>We=
 don&#39;t apply the doc folder when applying the series, in case a patch i=
ncluded code unrelated to documentation. If others in the group feel that i=
t&#39;s still unnecessary to include &quot;doc&quot; labeled series, I can =
look into filtering them out.</div><div><br></div><div>Thanks.<br></div><di=
v><br></div></div></div></div></div></div></div></div></div></div></div><br=
><div class=3D"gmail_quote"><div dir=3D"ltr">On Fri, Jan 4, 2019 at 5:46 AM=
 Rami Rosen &lt;<a href=3D"mailto:ramirose@gmail.com" target=3D"_blank" rel=
=3D"noreferrer">ramirose@gmail.com</a>&gt; wrote:<br></div><blockquote clas=
s=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-left:1px solid r=
gb(204,204,204);padding-left:1ex"><div dir=3D"ltr"><div dir=3D"ltr"><div di=
r=3D"ltr">Hi,<div>I have a question about DPDK CI process and the tests don=
e when a patch is submitted to dpdk-dev mailing list.</div><div>In DPDK pat=
ch work I see these response messages from the DPDK CI for all patches:</di=
v><div><br></div><div>...</div><div><div><div><font face=3D"Helvetica Neue,=
 Helvetica, Arial, sans-serif" color=3D"#333333"><span style=3D"font-size:1=
4px">ci/intel-Performance-Testing<span style=3D"white-space:pre-wrap">	</sp=
an>success<span style=3D"white-space:pre-wrap">	</span>Performance Testing =
PASS</span></font></div><div><font face=3D"Helvetica Neue, Helvetica, Arial=
, sans-serif" color=3D"#333333"><span style=3D"font-size:14px">ci/mellanox-=
Performance-Testing<span style=3D"white-space:pre-wrap">	</span>success<spa=
n style=3D"white-space:pre-wrap">	</span>Performance Testing PASS=C2=A0</sp=
an></font></div></div><div><font face=3D"Helvetica Neue, Helvetica, Arial, =
sans-serif" color=3D"#333333"><span style=3D"font-size:14px">...</span></fo=
nt></div><div><font face=3D"Helvetica Neue, Helvetica, Arial, sans-serif" c=
olor=3D"#333333"><span style=3D"font-size:14px"><br></span></font></div><di=
v><font face=3D"Helvetica Neue, Helvetica, Arial, sans-serif" color=3D"#333=
333"><span style=3D"font-size:14px">My question is (I hope and believe the =
info is available publicly) : which tests are run in the ci, generating the=
se messages?=C2=A0 is it done with IXIA and DTS ? (DPDK test suite,=C2=A0<a=
 href=3D"https://doc.dpdk.org/dts/gsg/" target=3D"_blank" rel=3D"noreferrer=
">https://doc.dpdk.org/dts/gsg/</a>) ? are these l2fwd/l3fwd performance te=
sts? or more than that ? and on which Intel/Mellanox nics ?=C2=A0</span></f=
ont><span style=3D"font-size:14px;color:rgb(51,51,51);font-family:&quot;Hel=
vetica Neue&quot;,Helvetica,Arial,sans-serif">=C2=A0Are these merely perfor=
mance tests, or also=C2=A0</span></div><div><font face=3D"Helvetica Neue, H=
elvetica, Arial, sans-serif" color=3D"#333333"><span style=3D"font-size:14p=
x">functional tests ?=C2=A0</span></font></div><div><span style=3D"font-siz=
e:14px;color:rgb(51,51,51);font-family:&quot;Helvetica Neue&quot;,Helvetica=
,Arial,sans-serif"><br></span></div><div><font face=3D"Helvetica Neue, Helv=
etica, Arial, sans-serif" color=3D"#333333"><span style=3D"font-size:14px">=
And BTW, I noticed that the CI runs a full performance cycle also for doc p=
atches (at least these messages are generated), which is a kind of redundan=
t (unless there is some filter which checks that if a patch only affects mo=
dules under &quot;doc&quot;, than such a cycle is not done but the messages=
 are still sent)<br></span></font></div><div><br></div><div dir=3D"ltr" cla=
ss=3D"m_8710140823469032295gmail-m_-6386449682181207695gmail_signature"><di=
v dir=3D"ltr">Regards,<br><div>Rami Rosen<br></div></div></div></div></div>=
</div></div>
</blockquote></div><br clear=3D"all"><br>-- <br><div dir=3D"ltr" class=3D"m=
_8710140823469032295gmail_signature"><div dir=3D"ltr"><div><div dir=3D"ltr"=
><div><div dir=3D"ltr"><div><div dir=3D"ltr"><div><div dir=3D"ltr"><div></d=
iv>Jeremy Plsek<br></div><div>UNH InterOperability Laboratory<br><br></div>=
</div></div></div></div></div></div></div></div></div>
</blockquote></div></div>

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