From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 050284662B; Fri, 25 Apr 2025 16:42:21 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E91B040279; Fri, 25 Apr 2025 16:42:20 +0200 (CEST) Received: from mail-pj1-f51.google.com (mail-pj1-f51.google.com [209.85.216.51]) by mails.dpdk.org (Postfix) with ESMTP id 683234025E for ; Fri, 25 Apr 2025 16:42:19 +0200 (CEST) Received: by mail-pj1-f51.google.com with SMTP id 98e67ed59e1d1-3012a0c8496so1865368a91.2 for ; Fri, 25 Apr 2025 07:42:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iol.unh.edu; s=unh-iol; t=1745592138; x=1746196938; darn=dpdk.org; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=3aBQeb7QRGmNaqGuNoAtJa5ris6lKIpTDHvG49Amr20=; b=br7EN+CsjvQO7uz3qq3qrzj+ss5A2HCP/XY4TQwHpA+K7ffioJF9LOHuJnGKiYuoPW BrlX+CE/cbOPFagnXQcmFWFG0WaX/54DxHfPUUxh4zBblYCFjveW7///EveSJKUo4q3A VeVLVme+E3fghRmMaGNlBkP0tHlInpDIwCoBQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1745592138; x=1746196938; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=3aBQeb7QRGmNaqGuNoAtJa5ris6lKIpTDHvG49Amr20=; b=Gg30Vk673Jx9rzUN6Z6UTg1Qr/CRqg2DDiWhd5ksHS4EVkPf8MQ5IjCh7PKQiLa4oO Arnpf2qpHbvvv5JeetbUBgvMiKR8adWrCVNCTcyOnorTMtqlu94GSujQHSxx46LAwQeo 6Ir5kTWWXGWS9iNoiEpmVMRyMf3urGcYyjHFFF90jX87OOqRdARh9ulgpOetBYWSrMVF jdXfVPoc6jI84hZ5wrfIIYjzvsA3scEKQd5YFnopxX79nZVQoWfv1QzkysSh5iWhQCSc yc8Ezxq8cxdvRf20ownKm/cGCDFav4bXl6llFT57oFLb9bOGvUBS+1yOhl/+rJRTmKWu N7Fw== X-Forwarded-Encrypted: i=1; AJvYcCWEupNUYrY2L17DwTv/qMLGSPv8KcxwCYDET1Hi1BoxBkS04CmuQfRLFts9M4o5Gv2CxQ==@dpdk.org X-Gm-Message-State: AOJu0Yx/sNoknBvwwuOUXSgoVIe9eboNEgKP23ehBMsDlCOFwq+kQjjQ 5+hSN8VhJ+gIKQlQHJxupAyYEeGF1dqtj8Zdkx1UxuLNEH/Km0GEmPxU6r6L9AUgXl/IemmVSse nhby3NYUbztJU6v0X9klVr8UkAZ28VJBN5qq5Bg== X-Gm-Gg: ASbGnctO95j8p2Y+mKhvQCUOiFZPf0DXPpeg2cd3m0HTUg3EHy8cLMQ1T8uH2EFReRr so4T46yHaZU7y55SiPPrPzYokdRdzVvWEd6NaZlZ0Xdj/TpFjfuH3vEdVEVRbeJP/y5ZLRBt63L rsdSyeeczjUI4RPH9UrcsmWXUcIzvS0Hy0n9nZKkX9h7q3ntJlnfeaFNz2ql2NFmj8Fg== X-Google-Smtp-Source: AGHT+IEj9UxzvSnnGnrEX6D+QbE5N66X2217IkfCyQcWSTnJCs4xeXWoNJ2mHeO/KPrRjPwy/1PGAl29EhveRqRbtoY= X-Received: by 2002:a17:90b:56c8:b0:301:1d9f:4ba2 with SMTP id 98e67ed59e1d1-309f7e88b5bmr4071737a91.28.1745592138262; Fri, 25 Apr 2025 07:42:18 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Patrick Robb Date: Fri, 25 Apr 2025 10:37:54 -0400 X-Gm-Features: ATxdqUEWMG-kGu7S5nG7LQfkTaUvILa5JJ_HERBi5Yrdwc1yHW5_uVHm66sXC4U Message-ID: Subject: Re: Intel QuickAssist crypto operations testing To: Cody Cheng Cc: "Mcnamara, John" , "Richardson, Bruce" , "Ji, Kai" , Dean Marx , Adam Hassick , Nicholas Pratte , "ci@dpdk.org" Content-Type: multipart/alternative; boundary="00000000000052fdbf06339b5795" X-BeenThere: ci@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK CI discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: ci-bounces@dpdk.org --00000000000052fdbf06339b5795 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hello, We are going to go ahead and enable this testing per-patch starting today, but again we looked at the performance metrics and they seemed reasonable - so we should be good to go. If you do end up wanting to take a closer look, let us know what info we can provide. We can also grant you VPN/SSH access to the DUT system if you want to take a look for any reason. Thanks. On Wed, Apr 23, 2025 at 10:58=E2=80=AFAM Cody Cheng wr= ote: > Hi Kai, > > I am reaching out to you regarding our efforts to set up a new QAT > device at the DPDK Community Lab. This is for adding a new QAT Device, > beyond the QAT PCI card that we set up and began testing last year for > an ARM Ampere System. > > I've set up testing for the Intel QAT 4xxx series device, but I just > wanted to double-check that the performance metrics we are seeing from > DPDK's test-crypto-perf application look acceptable to you. We are > running a DTS testsuite which uses the dpdk-test-crypto-perf > application in throughput, latency, and verify mode for testing. If > you want to see the test plan, you can read it here: > > https://git.dpdk.org/tools/dts/tree/test_plans/crypto_perf_cryptodev_perf= _test_plan.rst > > Could you review the test results and let me know if they seem correct > for this QAT SKU? > > Here are the test results. The metrics you are looking for should be > visible in the perf_cryptodev_result.json file: > > https://drive.google.com/drive/folders/1PfFziVYrD_Z2HQfXprty2lLNq5YX1Y7Y > > Thanks, > Cody Cheng > > > On Tue, Apr 8, 2025 at 2:36=E2=80=AFPM Mcnamara, John > wrote: > > > > Hi, > > > > > > > > You can bounce the numbers, or any questions, off Kai Ji (added). > > > > > > > > John > > > > > > > > > > > > From: Patrick Robb > > Sent: Tuesday, April 8, 2025 6:03 PM > > To: Richardson, Bruce > > Cc: Cody Cheng ; Dean Marx ; > Adam Hassick ; Nicholas Pratte ; > ci@dpdk.org > > Subject: Intel QuickAssist crypto operations testing > > > > > > > > Hi Bruce, > > > > > > > > Do you remember last year when we had a tech board call about the serve= r > refresh at UNH-IOL, you recommended that for the Intel processor DUT > system, we get a processor SKU which includes a QAT device? We did this, > and the SKU we selected was Intel(R) Xeon(R) Gold 5415+. > > > > > > > > Those devices are QAT 4xxx series QAT 4942 as reported by > dpdk-devbind.py --status: > > > > > > > > Crypto devices using kernel driver > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > 0000:76:00.0 '4xxx Series QAT 4942' numa_node=3D0 drv=3D4xxx > unused=3Dqat_4xxx,vfio-pci > > 0000:f3:00.0 '4xxx Series QAT 4942' numa_node=3D1 drv=3D4xxx > unused=3Dqat_4xxx,vfio-pci > > > > > > > > Cody has been setting up the testing for this QAT device, which is done > via DPDK's test-crypto-perf application. He is satisfied with the metrics > the card is getting with DPDK (he compared them against some reports Inte= l > has published and also what we see on a QAT PCI card on an Ampere ARM > system here at UNH). > > > > > > > > So, he thinks we are ready to go online. However, in order to be > careful, we were wondering if we should run the information we have by an > Intel contact first. Is there any DPDK/quickassist/crypto person on your > team who could serve as a contact for this purpose? If so, I think Cody c= an > add them to this thread and share the more detailed info for that person > for them to approve (or disapprove). > > > > > > > > Thanks let me know! > > > > > > > > -Patrick > > > > > > > > > --00000000000052fdbf06339b5795 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hello,

We are going to go ahead and ena= ble this testing per-patch starting today, but again we looked at the perfo= rmance metrics and they seemed reasonable - so we should be good to go.

If you do end up wanting to take a closer look, let u= s know what info we can provide. We can also grant you VPN/SSH access to th= e DUT system if you want to take a look for any reason.=C2=A0
Thanks.

On Wed, Apr 23, 2025 at 10:5= 8=E2=80=AFAM Cody Cheng <ccheng@io= l.unh.edu> wrote:
Hi Kai,

I am reaching out to you regarding our efforts to set up a new QAT
device at the DPDK Community Lab. This is for adding a new QAT Device,
beyond the QAT PCI card that we set up and began testing last year for
an ARM Ampere System.

I've set up testing for the Intel QAT 4xxx series device, but I just wanted to double-check that the performance metrics we are seeing from
DPDK's test-crypto-perf application look acceptable to you. We are
running a DTS testsuite which uses the dpdk-test-crypto-perf
application in throughput, latency, and verify mode for testing. If
you want to see the test plan, you can read it here:
https://git.d= pdk.org/tools/dts/tree/test_plans/crypto_perf_cryptodev_perf_test_plan.rst<= /a>

Could you review the test results and let me know if they seem correct
for this QAT SKU?

Here are the test results. The metrics you are looking for should be
visible in the perf_cryptodev_result.json file:

https://drive.google.com/dri= ve/folders/1PfFziVYrD_Z2HQfXprty2lLNq5YX1Y7Y

Thanks,
Cody Cheng


On Tue, Apr 8, 2025 at 2:36=E2=80=AFPM Mcnamara, John <john.mcnamara@intel.com>= wrote:
>
> Hi,
>
>
>
> You can bounce the numbers, or any questions, off Kai Ji (added).
>
>
>
> John
>
>
>
>
>
> From: Patrick Robb <probb@iol.unh.edu>
> Sent: Tuesday, April 8, 2025 6:03 PM
> To: Richardson, Bruce <bruce.richardson@intel.com>
> Cc: Cody Cheng <ccheng@iol.unh.edu>; Dean Marx <dmarx@iol.unh.edu>; Adam Hassick <ahassick@iol.unh.edu<= /a>>; Nicholas Pratte <npratte@iol.unh.edu>; ci@dpdk.org
> Subject: Intel QuickAssist crypto operations testing
>
>
>
> Hi Bruce,
>
>
>
> Do you remember last year when we had a tech board call about the serv= er refresh at UNH-IOL, you recommended that for the Intel processor DUT sys= tem, we get a processor SKU which includes a QAT device? We did this, and t= he SKU we selected was Intel(R) Xeon(R) Gold 5415+.
>
>
>
> Those devices are QAT 4xxx series QAT 4942 as reported by dpdk-devbind= .py --status:
>
>
>
> Crypto devices using kernel driver
> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> 0000:76:00.0 '4xxx Series QAT 4942' numa_node=3D0 drv=3D4xxx u= nused=3Dqat_4xxx,vfio-pci
> 0000:f3:00.0 '4xxx Series QAT 4942' numa_node=3D1 drv=3D4xxx u= nused=3Dqat_4xxx,vfio-pci
>
>
>
> Cody has been setting up the testing for this QAT device, which is don= e via DPDK's test-crypto-perf application. He is satisfied with the met= rics the card is getting with DPDK (he compared them against some reports I= ntel has published and also what we see on a QAT PCI card on an Ampere ARM = system here at UNH).
>
>
>
> So, he thinks we are ready to go online. However, in order to be caref= ul, we were wondering if we should run the information we have by an Intel = contact first. Is there any DPDK/quickassist/crypto person on your team who= could serve as a contact for this purpose? If so, I think Cody can add the= m to this thread and share the more detailed info for that person for them = to approve (or disapprove).
>
>
>
> Thanks let me know!
>
>
>
> -Patrick
>
>
>
>
--00000000000052fdbf06339b5795--