From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2496945EC4; Mon, 16 Dec 2024 23:00:16 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0856A402A3; Mon, 16 Dec 2024 23:00:16 +0100 (CET) Received: from mail-pg1-f176.google.com (mail-pg1-f176.google.com [209.85.215.176]) by mails.dpdk.org (Postfix) with ESMTP id DA48840267 for ; Mon, 16 Dec 2024 23:00:14 +0100 (CET) Received: by mail-pg1-f176.google.com with SMTP id 41be03b00d2f7-7feb6871730so3110556a12.2 for ; Mon, 16 Dec 2024 14:00:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iol.unh.edu; s=unh-iol; t=1734386414; x=1734991214; darn=dpdk.org; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=I37e1EWiVHxt/nXxHyYJs7AH2cwiJDthkSLAhFDrtik=; b=QlG9uUtLq0V637TT599gYKp6WUUgUIAmqPi/NLurhegCDF9X7LJt7EjGp9OAfuFijv BE4I724FydloEmc+L8rCy+Owvc2PprgI7E3+N1WCw5edE1TIqno92tLufj/1OuIYpg34 4gik/2C+sPYFqwnfb20JO/IWNm+Tw+UyNoqN8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734386414; x=1734991214; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=I37e1EWiVHxt/nXxHyYJs7AH2cwiJDthkSLAhFDrtik=; b=KEovj7HKTjfocGi16yq/F5sGxUOFkUmLkilYhbAV4yx3N3XAAre4IwRf3HzjdflwTR OAIMiiVJX6merd2WqY+CNxIPnujyOgsoLxJWP7KyF0pyvqbVUMYOnLIlDL3AVLJ75ShR n8zWZJ6qUggAagfPRR5NtB8pJ36JuTh2/0kmMf0TNDG7U90pyP9qqV5jQ6yUPxlYn7gT PO+APu9eQnDmLl/pcZ7lbkZ6CcGXn6GKN+ZQnkmQpbWUDTweSd7VA2Su4PT6FSc9Au+s vZs6Kkqnmk4/gf0kzMPbeOsVeDlp3Uv/oYF5WhDsmkkgH5QbGqgqys4nElOO8Q8gaRB8 1ukw== X-Forwarded-Encrypted: i=1; AJvYcCVWMhHVgM2MVgcFcOJfyBD/XnDRJAilUHJ+x8QYGR6QAxJyhrqphvTfesXP0G1qUQtTiA==@dpdk.org X-Gm-Message-State: AOJu0Yztby7+1ULDaxZqPc5bBJZxYQbehAANPyRH9/e3SpPO3GHmMyyS wRaUPWVRfQiIW8h5VveZ54zmhL51fQVcfe5FxdkG9I0wqpartGjtrK+4Kr5WY3oCCpQGPTFLbet Hru5MdP1EvQsoTMLr7vbfS1M9nbSicu53M0uiFg== X-Gm-Gg: ASbGncs6vkunCdwjN2vscfb4Xzpi6d+MKIHPMbYDqDDaapHn7F7k/UkOmYSVpRN7/zi 1kUD9RcSS+fdVeW1FjhwVGbxNatTORkeP6XqhsR4L82dGPJsXLX6K/Fh5NWDiS3jxRO7ASQs= X-Google-Smtp-Source: AGHT+IGHf47xmI3HaE8Pcz5hFShdRj18eP1UGvIL4fH4Va0gJa1tSbMndIqFG2Gxe94W5/AzzEqVKGNIeWmMJuNus2U= X-Received: by 2002:a17:90b:4b0f:b0:2ee:bbd8:2b7e with SMTP id 98e67ed59e1d1-2f28fb6aba4mr25509556a91.12.1734386413825; Mon, 16 Dec 2024 14:00:13 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Patrick Robb Date: Mon, 16 Dec 2024 16:57:50 -0500 Message-ID: Subject: Re: [EXTERNAL] CN10K Crypto Test Issue To: Hiral Shah Cc: Cody Cheng , Gnanesh Kambalu Palanethra , JogaRao Nartu , Bharath Rajendra , "ci@dpdk.org" Content-Type: multipart/alternative; boundary="000000000000198bdb06296a4e6f" X-BeenThere: ci@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK CI discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: ci-bounces@dpdk.org --000000000000198bdb06296a4e6f Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Hiral, Sorry about the last minute planning today - I am scheduling a call for us for Wednesday at 9:30AM PST. Cody will be in class at that time but I will be available and I believe I know all the details of his issue. ---------------------------------------------------------------------------= -------------------------------- Patrick Robb is inviting you to a scheduled Zoom meeting. Topic: Marvell Crypto Sync Time: Dec 18, 2024 12:30 PM Eastern Time (US and Canada) Join from PC, Mac, Linux, iOS or Android: https://unh.zoom.us/j/93859170209 Keyboard shortcuts are available to navigate this Zoom meeting or webinar: https://support.zoom.us/hc/en-us/articles/205683899-Hot-Keys-and-Keyboard-f= or-Zoom Or iPhone one-tap: 13052241968,93859170209# or 13092053325,93859170209# Or Telephone: Dial: +1 305 224 1968 (US Toll) Meeting ID: 938 5917 0209 International numbers available: https://unh.zoom.us/u/acTtiNQKou Or a H.323/SIP room system: H.323: rc.unh.edu or 144.195.19.161 (US West) or 206.247.11.121 (US East) Meeting ID: 938 5917 0209 SIP: 93859170209@zoomcrc.com TROUBLESHOOTING STEPS: Audio Echo In A Meeting: https://support.zoom.us/hc/en-us/articles/202050538-Audio-Echo-In-A-Meeting Want to Join a Test Meeting?: https://zoom.us/test On Mon, Dec 16, 2024 at 3:51=E2=80=AFPM Patrick Robb wr= ote: > Thanks Hiral for the offer of help, here is a zoom invite for a meeting > from 1pm-2pm PST today (in 10 minutes). > > Sorry for the last notice, I can certainly reschedule if needed. > > Patrick Robb is inviting you to a scheduled Zoom meeting. > > Topic: Marvell DPDK Cryptodev sync > Time: Dec 16, 2024 04:00 PM Eastern Time (US and Canada) > > Join from PC, Mac, Linux, iOS or Android: > https://unh.zoom.us/j/99749831096 > > Keyboard shortcuts are available to navigate this Zoom meeting or webinar= : > https://support.zoom.us/hc/en-us/articles/205683899-Hot-Keys-and-Keyboard= -for-Zoom > > Or iPhone one-tap: 16468769923,99749831096# or 16469313860,99749831096# > > Or Telephone: > Dial: +1 646 876 9923 (US Toll) > Meeting ID: 997 4983 1096 > International numbers available: https://unh.zoom.us/u/aAZFiJCIr > > Or a H.323/SIP room system: > H.323: rc.unh.edu or 144.195.19.161 (US West) or 206.247.11.121 (US > East) > Meeting ID: 997 4983 1096 > SIP: 99749831096@zoomcrc.com > > TROUBLESHOOTING STEPS: > > Audio Echo In A Meeting: > https://support.zoom.us/hc/en-us/articles/202050538-Audio-Echo-In-A-Meeti= ng > > Want to Join a Test Meeting?: https://zoom.us/test > > On Mon, Dec 16, 2024 at 2:39=E2=80=AFPM Patrick Robb = wrote: > >> Thanks, just confirming is this pacific time? >> >> On Mon, Dec 16, 2024 at 2:27=E2=80=AFPM Hiral Shah w= rote: >> >>> Sure! >>> >>> We can have sync up today between 1PM -3 PM or Wednesday 8:30AM -1 PM. >>> >>> >>> Regards, >>> Hiral >>> ------------------------------ >>> *From:* Patrick Robb >>> *Sent:* Monday, December 16, 2024 10:55 AM >>> *To:* Hiral Shah >>> *Cc:* Cody Cheng ; Gnanesh Kambalu Palanethra < >>> gpalanethra@marvell.com>; JogaRao Nartu ; Bharath >>> Rajendra ; ci@dpdk.org >>> *Subject:* Re: [EXTERNAL] CN10K Crypto Test Issue >>> >>> Hi Hiral, The cnxk crypto device VF creation and driver binding steps >>> that Cody wrote in his email are actually straight from the SDK documen= t. >>> Specifically he followed the steps from doc-base-SDK12. 24. >>> 11/dpdk/pmd/rte_cryptodev. html#initialization >>> Hi Hiral, >>> >>> The cnxk crypto device VF creation and driver binding steps that Cody >>> wrote in his email are actually straight from the SDK document. >>> Specifically he followed the steps >>> from doc-base-SDK12.24.11/dpdk/pmd/rte_cryptodev.html#initialization >>> >>> Thanks for offering a sync up - this would be ideal as we are still >>> stuck. We can schedule a Zoom and invite you. Do I remember correctly t= hat >>> you are in the pacific time zone? Is any particular day this week good = for >>> you? >>> >>> Thanks for all the help. >>> -Patrick >>> >>> On Mon, Dec 16, 2024 at 1:33=E2=80=AFPM Hiral Shah = wrote: >>> >>> Hi Cody, >>> >>> Can you please refer our SDK document? It should have clear >>> instructions. We can sync up if you still have any questions. >>> >>> Regards, >>> Hiral >>> ------------------------------ >>> *From:* Cody Cheng >>> *Sent:* Friday, December 13, 2024 11:47 AM >>> *To:* Gnanesh Kambalu Palanethra ; Hiral Shah = < >>> hshah@marvell.com> >>> *Cc:* JogaRao Nartu ; Bharath Rajendra < >>> brajendra@marvell.com>; Patrick Robb ; ci@dpdk.org < >>> ci@dpdk.org> >>> *Subject:* [EXTERNAL] CN10K Crypto Test Issue >>> >>> Hi Gnanesh & Hiral, My name is Cody Cheng, I'm a tester at the >>> University of New Hampshire DPDK Community Test Lab. We are hosting a C= N10K >>> board here which is currently running some ethernet device tests on DPD= K, >>> and we would like to extend >>> >>> Hi Gnanesh & Hiral, >>> >>> My name is Cody Cheng, I'm a tester at the University of New Hampshire >>> DPDK Community Test Lab. We are hosting a CN10K board here which is >>> currently running some ethernet device tests on DPDK, and we would >>> like to extend our testing to include crypto device testing. Gnanesh >>> has written a patch which adds testcases to the DPDK Test Suite which >>> should allow us to do so. >>> >>> However, I am running into difficulties with the crypto devices I >>> create in DPDK from the CN10K board. I would appreciate it if I can >>> sync with one of you next week so that I can show our current >>> configuration, and run through the DPDK crypto device setup process >>> and CN10K autotest (not passing currently). I am guessing there is >>> some error in our configuration. My coworker Patrick Robb has >>> mentioned he met with Hiral previously and it was a big help for >>> understanding how to flash the correct firmware, build the SDK and >>> tftpboot it, chroot to Ubuntu etc. I hope we can do something similar >>> to clear up the confusion regarding crypto devs. What timezones are >>> you in? I would be happy to schedule a Zoom call. >>> >>> Otherwise, I will share some of the system info and the process I have >>> run through below, which might begin to give you an idea regarding our >>> status: >>> >>> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >>> Marvell CN10k Boot Stub >>> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >>> Firmware Version: 2024-12-07 02:04:42 >>> EBF Version: 12.24.11, Branch: >>> /MarvellSDK/base-SDK12.24.11/cn10ka-release-output/build/marvell-extern= al-fw-SDK12.24.11/firmware/ebf, >>> Built: Sat, 07 Dec 2024 02:02:27 +0000 >>> >>> Board Model: crb106 >>> Board Revision: r1p1 >>> Board Serial: >>> >>> Chip: 0xb9 Pass A1 >>> SKU: MV-CN10624-A1-AAP >>> LLC: 49152 KB >>> Boot: SPI1_CS0,EMMC_CS0, using SPI1_CS0 >>> AVS: Enabled >>> >>> I am setting up 1 crypto virtual function using the commands here:https= ://urldefense.proofpoint.com/v2/url?u=3Dhttps-3A__doc.dpdk.org_guides_crypt= odevs_cnxk.html-23initialization&d=3DDwIBaQ&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3D= vGy6A_Vxl0vuken84vHnqSHz1sugoMRzgsw2uuNRAQ4&m=3DdN2bwgTF6BzuBPsPbKfZfmAua-f= oxlSSnMAoU8EjwCE3XN40flneiz1d7Mwl83iN&s=3D_d4kcuFSGcAGResAexjf_pFNDJ0Szm68p= M2tw5BFzUM&e=3D >>> >>> So afterwards I am left with 1 VF bound to vfio-pci at 0002:10.00.1 >>> >>> At this stage, according to the docs I should be able to launch >>> dpdk-test and run the cn10k symmetrical crypto autotest, using the >>> commands below: >>> >>> ``` >>> ./dpdk-test >>> RTE>>cryptodev_cn10k_autotest >>> ``` >>> >>> However, the auto tests fail and fall into an error loop which I have >>> attached the logs of in this email. >>> >>> Here is the EAL output from the logs: >>> >>> EAL: Detected CPU lcores: 24 >>> EAL: Detected NUMA nodes: 1 >>> EAL: Detected static linkage of DPDK >>> EAL: Multi-process socket /var/run/dpdk/rte/mp_socket >>> EAL: Selected IOVA mode 'VA' >>> EAL: VFIO support initialized >>> EAL: Using IOMMU type 1 (Type 1) >>> CNXK: RoC Model: cn10ka_a1 (HW_PLATFORM) >>> CRYPTODEV: Creating cryptodev 0002:20:00.1 >>> CRYPTODEV: Initialisation parameters - name: 0002:20:00.1,socket id: >>> 0, max queue pairs: 0 >>> APP: HPET is not enabled, using TSC as default timer >>> >>> In the EAL output, max queue pairs is 0 even though in the docs, it >>> says the Maximum queue pairs limit is set to a default of 63. Could >>> this be related to the issue? >>> >>> Also, here is my kernel cmdline parameters: >>> >>> console=3DttyAMA0,115200n8 earlycon=3Dp1011,0x87e028000000 maxcpus=3D24 >>> rootwait root=3D/dev/nvme0n1p1 rw coherent_pool=3D16M >>> default_hugepagesz=3D512M hugepagesz=3D512M hugepages=3D8 >>> >>> Does this look correct? >>> >>> I have also tried setting `iommu.passthrough=3D1` in the boot arguments >>> but that resulted in the same dpdk-test failure. >>> >>> Best Regards, >>> Cody Cheng >>> >>> --000000000000198bdb06296a4e6f Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Hiral,

Sorry about the last minute p= lanning today - I am scheduling a call for us for Wednesday at 9:30AM PST. = Cody will be in class at that time but I will be available and I believe I = know all the details of his issue.=C2=A0

---------= ---------------------------------------------------------------------------= -----------------------

Patrick Robb is inviting y= ou to a scheduled Zoom meeting.

Topic: Marvell Crypto Sync
Time:= Dec 18, 2024 12:30 PM Eastern Time (US and Canada)

Join from PC, M= ac, Linux, iOS or Android: ht= tps://unh.zoom.us/j/93859170209

Keyboard shortcuts are available= to navigate this Zoom meeting or webinar: https://supp= ort.zoom.us/hc/en-us/articles/205683899-Hot-Keys-and-Keyboard-for-Zoom<= br>=C2=A0
Or iPhone one-tap: =C2=A013052241968,93859170209# or 130920533= 25,93859170209#

Or Telephone:
=C2=A0 =C2=A0 Dial: +1 305 224 1968= (US Toll)
=C2=A0 =C2=A0 Meeting ID: 938 5917 0209
=C2=A0 =C2=A0 Int= ernational numbers available: = https://unh.zoom.us/u/acTtiNQKou

Or a H.323/SIP room system:=C2=A0 =C2=A0 H.323: rc.unh.edu or 144.1= 95.19.161 (US West) or 206.247.11.121 (US East)
=C2=A0 =C2=A0 Meeting I= D: 938 5917 0209
=C2=A0 =C2=A0 SIP: 93859170209@zoomcrc.com

TROUBLESHOOTING STEPS:

Aud= io Echo In A Meeting: https://support.zoom.us/hc/en-us/article= s/202050538-Audio-Echo-In-A-Meeting

Want to Join a Test Meeting?= : https://zoom.us/test

=
On Mon, Dec 16, 2024 at 3:51=E2=80=AFPM Patrick Robb <probb@iol.unh.edu> wrote:
Thanks Hir= al for the offer of help, here is a zoom invite for a meeting from 1pm-2pm = PST today (in 10 minutes).

Sorry for the last notice, I = can certainly reschedule if needed.

Patrick Robb i= s inviting you to a scheduled Zoom meeting.

Topic: Marvell DPDK Cry= ptodev sync
Time: Dec 16, 2024 04:00 PM Eastern Time (US and Canada)
Join from PC, Mac, Linux, iOS or Android: https://unh.zoom.us/j/99749831096
Keyboard shortcuts are available to navigate this Zoom meeting or web= inar: https://support.zoom.us/hc/en-u= s/articles/205683899-Hot-Keys-and-Keyboard-for-Zoom
=C2=A0
Or iPh= one one-tap: =C2=A016468769923,99749831096# or 16469313860,99749831096#
=
Or Telephone:
=C2=A0 =C2=A0 Dial: +1 646 876 9923 (US Toll)
=C2= =A0 =C2=A0 Meeting ID: 997 4983 1096
=C2=A0 =C2=A0 International number= s available: = https://unh.zoom.us/u/aAZFiJCIr

Or a H.323/SIP room system:
= =C2=A0 =C2=A0 H.323: rc.unh= .edu or 144.195.19.161 (US West) or 206.247.11.121 (US East)
=C2=A0= =C2=A0 Meeting ID: 997 4983 1096
=C2=A0 =C2=A0 SIP: 99749831096@zoomcrc.com
TROUBLESHOOTING STEPS:

Audio Echo In A Meeting: https://support.zoom.us/hc/en-us/articles/202050538-Audio-Echo= -In-A-Meeting

Want to Join a Test Meeting?: https://zoom.us/test

On Mon, Dec 16= , 2024 at 2:39=E2=80=AFPM Patrick Robb <probb@iol.unh.edu> wrote:
Thanks, just confi= rming is this pacific time?

On Mon, Dec 16, 2024 at 2:27=E2=80=AFPM Hiral Sh= ah <hshah@marvell= .com> wrote:
Sure!

We can have sync up today between 1PM -3 PM or Wednesday 8:30AM -1 PM.=C2= =A0


Regards,
Hiral
From: Patrick Robb <probb@iol.unh.edu>
Sent: Monday, December 16, 2024 10:55 AM
To: Hiral Shah <hshah@marvell.com>
Cc: Cody Cheng <ccheng@iol.unh.edu>; Gnanesh Kambalu Palanethra <gpalanethra@marvell.c= om>; JogaRao Nartu <njogarao@marvell.com>; Bharath Rajendra <brajendra@marvell.com&g= t;; ci@dpdk.org <ci@dpdk.org>
Subject: Re: [EXTERNAL] CN10K Crypto Test Issue
=C2=A0
Hi Hiral, The cnxk crypto device VF creation and driver binding steps that = Cody wrote in his email are actually straight from the SDK document. Specif= ically he followed the steps from doc-base-SDK12.=E2=80=8A24.=E2=80=8A11/dp= dk/pmd/rte_cryptodev.=E2=80=8Ahtml#initialization
Hi Hiral,

The cnxk=C2=A0crypto device VF creation and driver binding steps that = Cody wrote in his email are actually straight from the SDK document. Specif= ically he followed the steps from=C2=A0doc-base-SDK12.24.11/dpdk/pmd/rte_cr= yptodev.html#initialization

Thanks for offering a sync up - this would be ideal as we are still st= uck. We can schedule a Zoom and invite you. Do I remember correctly that yo= u are in the pacific time zone? Is any particular day this week good for yo= u?=C2=A0

Thanks for all the help.
-Patrick

On Mon, Dec 16, 2024 at 1:33=E2=80=AFPM Hiral Shah <hshah@marvell.com&g= t; wrote:
Hi Cody,=C2=A0

Can you please refer our SDK document? It should have clear instructions. W= e can sync up if you still have any questions.=C2=A0

Regards,
Hiral
From: Cody Che= ng <ccheng@iol.u= nh.edu>
Sent: Friday, December 13, 2024 11:47 AM
To: Gnanesh Kambalu Palanethra <gpalanethra@marvell.com>; Hiral Shah <= ;hshah@marvell.com>
Cc: JogaRao Nartu <njogarao@marvell.com>; Bharath Rajendra <brajendra@marvell.com>= ;; Patrick Robb <= probb@iol.unh.edu>; ci@dpdk.org <ci@dpdk.org>
Subject: [EXTERNAL] CN10K Crypto Test Issue
=C2=A0
Hi Gnanesh & Hiral, My name is Cody Cheng, I'm a tester at the Univ= ersity of New Hampshire DPDK Community Test Lab. We are hosting a CN10K boa= rd here which is currently running some ethernet device tests on DPDK, and = we would like to extend
H=
i Gnanesh & Hiral,

My name is Cody Cheng, I'm a tester at the University of New Hampshire
DPDK Community Test Lab. We are hosting a CN10K board here which is
currently running some ethernet device tests on DPDK, and we would
like to extend our testing to include crypto device testing. Gnanesh
has written a patch which adds testcases to the DPDK Test Suite which
should allow us to do so.

However, I am running into difficulties with the crypto devices I
create in DPDK from the CN10K board. I would appreciate it if I can
sync with one of you next week so that I can show our current
configuration, and run through the DPDK crypto device setup process
and CN10K autotest (not passing currently). I am guessing there is
some error in our configuration. My coworker Patrick Robb has
mentioned he met with Hiral previously and it was a big help for
understanding how to flash the correct firmware, build the SDK and
tftpboot it, chroot to Ubuntu etc. I hope we can do something similar
to clear up the confusion regarding crypto devs. What timezones are
you in? I would be happy to schedule a Zoom call.

Otherwise, I will share some of the system info and the process I have
run through below, which might begin to give you an idea regarding our
status:

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
Marvell CN10k Boot Stub
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
Firmware Version: 2024-12-07 02:04:42
EBF Version: 12.24.11, Branch:
/MarvellSDK/base-SDK12.24.11/cn10ka-release-output/build/marvell-external-f=
w-SDK12.24.11/firmware/ebf,
Built: Sat, 07 Dec 2024 02:02:27 +0000

Board Model:    crb106
Board Revision: r1p1
Board Serial:   <redacted>

Chip:  0xb9 Pass A1
SKU:   MV-CN10624-A1-AAP
LLC:   49152 KB
Boot:  SPI1_CS0,EMMC_CS0, using SPI1_CS0
AVS:   Enabled

I am setting up 1 crypto virtual function using the commands here:
=
https://urldefense.proofpoint.com/v2/url?u=3Dhttps-3A__doc.dpdk.org_guides_=
cryptodevs_cnxk.html-23initialization&d=3DDwIBaQ&c=3DnKjWec2b6R0mOy=
Paz7xtfQ&r=3DvGy6A_Vxl0vuken84vHnqSHz1sugoMRzgsw2uuNRAQ4&m=3DdN2bwg=
TF6BzuBPsPbKfZfmAua-foxlSSnMAoU8EjwCE3XN40flneiz1d7Mwl83iN&s=3D_d4kcuFS=
GcAGResAexjf_pFNDJ0Szm68pM2tw5BFzUM&e=3D

So afterwards I am left with 1 VF bound to vfio-pci at 0002:10.00.1

At this stage, according to the docs I should be able to launch
dpdk-test and run the cn10k symmetrical crypto autotest, using the
commands below:

```
./dpdk-test
RTE>>cryptodev_cn10k_autotest
```

However, the auto tests fail and fall into an error loop which I have
attached the logs of in this email.

Here is the EAL output from the logs:

EAL: Detected CPU lcores: 24
EAL: Detected NUMA nodes: 1
EAL: Detected static linkage of DPDK
EAL: Multi-process socket /var/run/dpdk/rte/mp_socket
EAL: Selected IOVA mode 'VA'
EAL: VFIO support initialized
EAL: Using IOMMU type 1 (Type 1)
CNXK: RoC Model: cn10ka_a1 (HW_PLATFORM)
CRYPTODEV: Creating cryptodev 0002:20:00.1
CRYPTODEV: Initialisation parameters - name: 0002:20:00.1,socket id:
0, max queue pairs: 0
APP: HPET is not enabled, using TSC as default timer

In the EAL output, max queue pairs is 0 even though in the docs, it
says the Maximum queue pairs limit is set to a default of 63. Could
this be related to the issue?

Also, here is my kernel cmdline parameters:

console=3DttyAMA0,115200n8 earlycon=3Dp1011,0x87e028000000 maxcpus=3D24
rootwait root=3D/dev/nvme0n1p1 rw coherent_pool=3D16M
default_hugepagesz=3D512M hugepagesz=3D512M hugepages=3D8

Does this look correct?

I have also tried setting `iommu.passthrough=3D1` in the boot arguments
but that resulted in the same dpdk-test failure.

Best Regards,
Cody Cheng
--000000000000198bdb06296a4e6f--