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From: "Chao Zhu" <chaozhu@linux.vnet.ibm.com>
To: "'Nelio Laranjeiro'" <nelio.laranjeiro@6wind.com>, <dev@dpdk.org>
Cc: "'Thomas Monjalon'" <thomas.monjalon@6wind.com>,
	"'Jianbo Liu'" <jianbo.liu@linaro.org>,
	"'Jerin Jacob'" <jerin.jacob@caviumnetworks.com>,
	"'Zhigang Lu'" <zlu@ezchip.com>, "'Liming Sun'" <lsun@ezchip.com>,
	"'Bruce Richardson'" <bruce.richardson@intel.com>,
	"'Konstantin Ananyev'" <konstantin.ananyev@intel.com>,
	"'Adrien Mazarguil'" <adrien.mazarguil@6wind.com>
Subject: Re: [dpdk-dev] [PATCH] eal: define generic vector types
Date: Tue, 29 Nov 2016 16:12:38 +0800	[thread overview]
Message-ID: <000301d24a18$5aedf360$10c9da20$@linux.vnet.ibm.com> (raw)
In-Reply-To: <3ce1da9662dcf59950f43643c14cc14e972f0429.1479309557.git.nelio.laranjeiro@6wind.com>

-----Original Message-----
From: Nelio Laranjeiro [mailto:nelio.laranjeiro@6wind.com] 
Sent: 2016年11月16日 23:21
To: dev@dpdk.org
Cc: Thomas Monjalon <thomas.monjalon@6wind.com>; Jianbo Liu
<jianbo.liu@linaro.org>; Jerin Jacob <jerin.jacob@caviumnetworks.com>;
Zhigang Lu <zlu@ezchip.com>; Liming Sun <lsun@ezchip.com>; Chao Zhu
<chaozhu@linux.vnet.ibm.com>; Bruce Richardson <bruce.richardson@intel.com>;
Konstantin Ananyev <konstantin.ananyev@intel.com>; Adrien Mazarguil <adrien.
mazarguil@6wind.com>
Subject: [PATCH] eal: define generic vector types

Add common vector type definitions to all CPU architectures.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
---
 lib/librte_eal/common/Makefile                     |   1 +
 lib/librte_eal/common/include/arch/arm/rte_vect.h  |   1 +
 .../common/include/arch/ppc_64/rte_vect.h          |   1 +
 lib/librte_eal/common/include/arch/tile/rte_vect.h |  38 +++++
 lib/librte_eal/common/include/arch/x86/rte_vect.h  |   7 +-
 lib/librte_eal/common/include/generic/rte_vect.h   | 185
+++++++++++++++++++++
 6 files changed, 230 insertions(+), 3 deletions(-)  create mode 100644
lib/librte_eal/common/include/arch/tile/rte_vect.h
 create mode 100644 lib/librte_eal/common/include/generic/rte_vect.h

diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile
index dfd64aa..8af06b1 100644
--- a/lib/librte_eal/common/Makefile
+++ b/lib/librte_eal/common/Makefile
@@ -48,6 +48,7 @@ endif

 GENERIC_INC := rte_atomic.h rte_byteorder.h rte_cycles.h rte_prefetch.h
GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h rte_rwlock.h
+GENERIC_INC += rte_vect.h
 # defined in mk/arch/$(RTE_ARCH)/rte.vars.mk  ARCH_DIR ?= $(RTE_ARCH)
ARCH_INC := $(notdir $(wildcard
$(RTE_SDK)/lib/librte_eal/common/include/arch/$(ARCH_DIR)/*.h))
diff --git a/lib/librte_eal/common/include/arch/arm/rte_vect.h
b/lib/librte_eal/common/include/arch/arm/rte_vect.h
index b86c2cf..4107c99 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_vect.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_vect.h
@@ -34,6 +34,7 @@
 #define _RTE_VECT_ARM_H_

 #include <stdint.h>
+#include "generic/rte_vect.h"
 #include "arm_neon.h"

 #ifdef __cplusplus
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
index 05209e5..99586e5 100644
--- a/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
@@ -34,6 +34,7 @@
 #define _RTE_VECT_PPC_64_H_

 #include <altivec.h>
+#include "generic/rte_vect.h"

 #ifdef __cplusplus
 extern "C" {
diff --git a/lib/librte_eal/common/include/arch/tile/rte_vect.h
b/lib/librte_eal/common/include/arch/tile/rte_vect.h
new file mode 100644
index 0000000..f1e1709
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_vect.h
@@ -0,0 +1,38 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright 2016 6WIND S.A.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of 6WIND S.A. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_VECT_TILE_H_
+#define _RTE_VECT_TILE_H_
+
+#include "generic/rte_vect.h"
+
+#endif /* _RTE_VECT_TILE_H_ */
diff --git a/lib/librte_eal/common/include/arch/x86/rte_vect.h
b/lib/librte_eal/common/include/arch/x86/rte_vect.h
index 77f2e25..1b4b85d 100644
--- a/lib/librte_eal/common/include/arch/x86/rte_vect.h
+++ b/lib/librte_eal/common/include/arch/x86/rte_vect.h
@@ -31,8 +31,8 @@
  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */

-#ifndef _RTE_VECT_H_
-#define _RTE_VECT_H_
+#ifndef _RTE_VECT_X86_H_
+#define _RTE_VECT_X86_H_

 /**
  * @file
@@ -41,6 +41,7 @@
  */

 #include <stdint.h>
+#include "generic/rte_vect.h"

 #if (defined(__ICC) || (__GNUC__ == 4 &&  __GNUC_MINOR__ < 4))

@@ -133,4 +134,4 @@ __extension__ ({                 \
 }
 #endif

-#endif /* _RTE_VECT_H_ */
+#endif /* _RTE_VECT_X86_H_ */
diff --git a/lib/librte_eal/common/include/generic/rte_vect.h
b/lib/librte_eal/common/include/generic/rte_vect.h
new file mode 100644
index 0000000..d7b9cd9
--- /dev/null
+++ b/lib/librte_eal/common/include/generic/rte_vect.h
@@ -0,0 +1,185 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright 2016 6WIND S.A.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of 6WIND S.A. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_VECT_H_
+#define _RTE_VECT_H_
+
+#include <stdint.h>
+
+/* Unsigned vector types. */
+
+/*
+ * 64 bits vector size to use with unsigned 8 bits elements.
+ * a = (rte_v64u8_t){ a0, a1, a2, a3, a4, a5, a6, a7 }  */ typedef 
+uint8_t rte_v64u8_t __attribute__((vector_size(8), aligned(8)));
+
+/*
+ * 64 bits vector size to use with unsigned 16 bits elements.
+ * a = (rte_v64u16_t){ a0, a1, a2, a3 }  */ typedef uint16_t 
+rte_v64u16_t __attribute__((vector_size(8), aligned(8)));
+
+/*
+ * 64 bits vector size to use with unsigned 32 bits elements.
+ * a = (rte_v64u32_t){ a0, a1 }
+ */
+typedef uint32_t rte_v64u32_t __attribute__((vector_size(8), 
+aligned(8)));
+
+/*
+ * 128 bits vector size to use with unsigned 8 bits elements.
+ * a = (rte_v128u8_t){ a00, a01, a02, a03, a04, a05, a06, a07,
+ *                     a08, a09, a10, a11, a12, a13, a14, a15 }
+ */
+typedef uint8_t rte_v128u8_t __attribute__((vector_size(16), 
+aligned(16)));
+
+/*
+ * 128 bits vector size to use with unsigned 16 bits elements.
+ * a = (rte_v128u16_t){ a0, a1, a2, a3, a4, a5, a6, a7 }  */ typedef 
+uint16_t rte_v128u16_t __attribute__((vector_size(16), aligned(16)));
+
+/*
+ * 128 bits vector size to use with unsigned 32 bits elements.
+ * a = (rte_v128u32_t){ a0, a1, a2, a3, a4 }  */ typedef uint32_t 
+rte_v128u32_t __attribute__((vector_size(16), aligned(16)));
+
+/*
+ * 128 bits vector size to use with unsigned 64 bits elements.
+ * a = (rte_v128u64_t){ a0, a1 }
+ */
+typedef uint64_t rte_v128u64_t __attribute__((vector_size(16), 
+aligned(16)));
+
+/*
+ * 256 bits vector size to use with unsigned 8 bits elements.
+ * a = (rte_v256u8_t){ a00, a01, a02, a03, a04, a05, a06, a07,
+ *                     a08, a09, a10, a11, a12, a13, a14, a15,
+ *                     a16, a17, a18, a19, a20, a21, a22, a23,
+ *                     a24, a25, a26, a27, a28, a29, a30, a31 }
+ */
+typedef uint8_t rte_v256u8_t __attribute__((vector_size(32), 
+aligned(32)));
+
+/*
+ * 256 bits vector size to use with unsigned 16 bits elements.
+ * a = (rte_v256u16_t){ a00, a01, a02, a03, a04, a05, a06, a07,
+ *                      a08, a09, a10, a11, a12, a13, a14, a15 }
+ */
+typedef uint16_t rte_v256u16_t __attribute__((vector_size(32), 
+aligned(32)));
+
+/*
+ * 256 bits vector size to use with unsigned 32 bits elements.
+ * a = (rte_v256u32_t){ a0, a1, a2, a3, a4, a5, a6, a7 }  */ typedef 
+uint32_t rte_v256u32_t __attribute__((vector_size(32), aligned(32)));
+
+/*
+ * 256 bits vector size to use with unsigned 64 bits elements.
+ * a = (rte_v256u64_t){ a0, a1, a2, a3 }  */ typedef uint64_t 
+rte_v256u64_t __attribute__((vector_size(32), aligned(32)));
+
+
+/* Signed vector types. */
+
+/*
+ * 64 bits vector size to use with 8 bits elements.
+ * a = (rte_v64s8_t){ a0, a1, a2, a3, a4, a5, a6, a7 }  */ typedef 
+int8_t rte_v64s8_t __attribute__((vector_size(8), aligned(8)));
+
+/*
+ * 64 bits vector size to use with 16 bits elements.
+ * a = (rte_v64s16_t){ a0, a1, a2, a3 }  */ typedef int16_t 
+rte_v64s16_t __attribute__((vector_size(8), aligned(8)));
+
+/*
+ * 64 bits vector size to use with 32 bits elements.
+ * a = (rte_v64s32_t){ a0, a1 }
+ */
+typedef int32_t rte_v64s32_t __attribute__((vector_size(8), 
+aligned(8)));
+
+/*
+ * 128 bits vector size to use with 8 bits elements.
+ * a = (rte_v128s8_t){ a00, a01, a02, a03, a04, a05, a06, a07,
+ *                     a08, a09, a10, a11, a12, a13, a14, a15 }
+ */
+typedef int8_t rte_v128s8_t __attribute__((vector_size(16), 
+aligned(16)));
+
+/*
+ * 128 bits vector size to use with 16 bits elements.
+ * a = (rte_v128s16_t){ a0, a1, a2, a3, a4, a5, a6, a7 }  */ typedef 
+int16_t rte_v128s16_t __attribute__((vector_size(16), aligned(16)));
+
+/*
+ * 128 bits vector size to use with 32 bits elements.
+ * a = (rte_v128s32_t){ a0, a1, a2, a3 }  */ typedef int32_t 
+rte_v128s32_t __attribute__((vector_size(16), aligned(16)));
+
+/*
+ * 128 bits vector size to use with 64 bits elements.
+ * a = (rte_v128s64_t){ a1, a2 }
+ */
+typedef int64_t rte_v128s64_t __attribute__((vector_size(16), 
+aligned(16)));
+
+/*
+ * 256 bits vector size to use with 8 bits elements.
+ * a = (rte_v256s8_t){ a00, a01, a02, a03, a04, a05, a06, a07,
+ *                     a08, a09, a10, a11, a12, a13, a14, a15,
+ *                     a16, a17, a18, a19, a20, a21, a22, a23,
+ *                     a24, a25, a26, a27, a28, a29, a30, a31 }
+ */
+typedef int8_t rte_v256s8_t __attribute__((vector_size(32), 
+aligned(32)));
+
+/*
+ * 256 bits vector size to use with 16 bits elements.
+ * a = (rte_v256s16_t){ a00, a01, a02, a03, a04, a05, a06, a07,
+ *                      a08, a09, a10, a11, a12, a13, a14, a15 }
+ */
+typedef int16_t rte_v256s16_t __attribute__((vector_size(32), 
+aligned(32)));
+
+/*
+ * 256 bits vector size to use with 32 bits elements.
+ * a = (rte_v256s32_t){ a0, a1, a2, a3, a4, a5, a6, a7 }  */ typedef 
+int32_t rte_v256s32_t __attribute__((vector_size(32), aligned(32)));
+
+/*
+ * 256 bits vector size to use with 64 bits elements.
+ * a = (rte_v256s64_t){ a0, a1, a2, a3 }  */ typedef int64_t 
+rte_v256s64_t __attribute__((vector_size(32), aligned(32)));
+
+#endif /* _RTE_VECT_H_ */
--
2.1.4

Acked-by: Chao Zhu < chaozhu@linux.vnet.ibm.com>

  reply	other threads:[~2016-11-29  8:12 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-16 15:20 Nelio Laranjeiro
2016-11-29  8:12 ` Chao Zhu [this message]
2017-01-04 20:34   ` Thomas Monjalon

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