From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 303D442A0F; Thu, 27 Apr 2023 13:49:09 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B9E2642D2D; Thu, 27 Apr 2023 13:49:08 +0200 (CEST) Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by mails.dpdk.org (Postfix) with ESMTP id CB27A42B8C for ; Thu, 27 Apr 2023 13:49:06 +0200 (CEST) Received: from loongson.cn (unknown [10.20.42.90]) by gateway (Coremail) with SMTP id _____8CxPusvYUpkF5gBAA--.2753S3; Thu, 27 Apr 2023 19:49:04 +0800 (CST) Received: from [10.20.42.90] (unknown [10.20.42.90]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxprEvYUpkQKU+AA--.19463S3; Thu, 27 Apr 2023 19:49:03 +0800 (CST) Subject: Re: [PATCH] net/ixgbe: consider DCB/VMDq conf when getting RSS conf To: "Zhang, Qi Z" , "Yang, Qiming" , "Wu, Wenjun1" Cc: "dev@dpdk.org" , "maobibo@loongson.cn" References: <20230412100144.1713426-1-zhoumin@loongson.cn> From: zhoumin Message-ID: <0022acbd-bf08-a940-6ab6-aafaff656d8d@loongson.cn> Date: Thu, 27 Apr 2023 19:49:03 +0800 User-Agent: Mozilla/5.0 (X11; Linux loongarch64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-CM-TRANSID: AQAAf8CxprEvYUpkQKU+AA--.19463S3 X-CM-SenderInfo: 52kr3ztlq6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjvJXoWxCFyDXry8uF13trWDCw1kAFb_yoWrGFy8pF srG3WSk3WUZrs29wn3X3y7Wr13Xw40qryUCr4xKw13Xr98AaykKFs3tF18JFyUZryIyay3 ZFWrWrs7KFn5Z37anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU bxxYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_Jr0_Jr4l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVW8JVW5JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4 x0Y4vEx4A2jsIE14v26F4UJVW0owA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_GcCE3s1le2I2 62IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4xG64xvF2IEw4 CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JrI_JrylYx0Ex4A2jsIE14v26r1j6r4UMcvj eVCFs4IE7xkEbVWUJVW8JwACjcxG0xvEwIxGrwCYjI0SjxkI62AI1cAE67vIY487MxAIw2 8IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4l x2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrw CI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI 42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z2 80aVCY1x0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxUrNtxDUUUU X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi Qi, Thanks your kind review. On Thu, Apr 27, 2023 at 7:01PM, Zhang, Qi Z wrote: >> -----Original Message----- >> From: Min Zhou >> Sent: Wednesday, April 12, 2023 6:02 PM >> To: Yang, Qiming ; Wu, Wenjun1 >> ; zhoumin@loongson.cn >> Cc: dev@dpdk.org; maobibo@loongson.cn >> Subject: [PATCH] net/ixgbe: consider DCB/VMDq conf when getting RSS conf >> >> The mrqe field of MRQC register is an enum. From the Intel 82599 datasheet, >> we know that these values below for the mrqe field are all related to RSS >> configuration: >> 0000b = RSS disabled. >> 0001b = RSS only -- Single set of RSS 16 queues. >> 0010b = DCB enabled and RSS disabled -- 8 TCs, each allocated 1 >> queue. >> 0011b = DCB enabled and RSS disabled -- 4 TCs, each allocated 1 >> queue. >> 0100b = DCB and RSS -- 8 TCs, each allocated 16 RSS queues. >> 0101b = DCB and RSS -- 4 TCs, each allocated 16 RSS queues. >> 1000b = Virtualization only -- 64 pools, no RSS, each pool allocated >> 2 queues. >> 1010b = Virtualization and RSS -- 32 pools, each allocated 4 RSS >> queues. >> 1011b = Virtualization and RSS -- 64 pools, each allocated 2 RSS >> queues. >> >> The ixgbe pmd will check whether the rss is enabled or not when getting rss >> conf. So, beside comparing the value of mrqe field with xxx0b and xxx1b, we >> also needto consider the other configurations, such as DCB + RSS or VMDQ + >> RSS. Otherwise, we may not get the correct rss conf in some cases, such as >> when we use DCB and RSS with 8 TCs which corresponds to 0100b for the >> mrqe field. >> >> Signed-off-by: Min Zhou >> --- >> drivers/net/ixgbe/ixgbe_rxtx.c | 91 ++++++++++++++++++++++++++++++---- >> 1 file changed, 80 insertions(+), 11 deletions(-) >> >> diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c >> index c9d6ca9efe..1eff0053ed 100644 >> --- a/drivers/net/ixgbe/ixgbe_rxtx.c >> +++ b/drivers/net/ixgbe/ixgbe_rxtx.c >> @@ -3461,18 +3461,89 @@ static uint8_t rss_intel_key[40] = { >> 0x6A, 0x42, 0xB7, 0x3B, 0xBE, 0xAC, 0x01, 0xFA, }; >> >> +/* >> + * This function removes the rss configuration in the mrqe field of >> +MRQC >> + * register and tries to maintain other configurations in the field, >> +such >> + * DCB and Virtualization. >> + * >> + * The MRQC register supplied in section 7.1.2.8.3 of the Intel 82599 >> datasheet. >> + * From the datasheet, we know that the mrqe field is an enum. So, >> +masking the >> + * mrqe field with '~IXGBE_MRQC_RSSEN' may not completely disable rss >> + * configuration. For example, the value of mrqe is equal to 0101b when >> +DCB and >> + * RSS with 4 TCs configured, however 'mrqe &= ~0x01' is equal to 0100b >> +which >> + * corresponds to DCB and RSS with 8 TCs. >> + */ >> +static void >> +ixgbe_mrqc_rss_remove(struct ixgbe_hw *hw) { >> + uint32_t mrqc; >> + uint32_t mrqc_reg; >> + uint32_t mrqe_val; >> + >> + mrqc_reg = ixgbe_mrqc_reg_get(hw->mac.type); >> + mrqc = IXGBE_READ_REG(hw, mrqc_reg); >> + mrqe_val = mrqc & IXGBE_MRQC_MRQE_MASK; >> + >> + switch (mrqe_val) { >> + case IXGBE_MRQC_RSSEN: >> + /* Completely disable rss */ >> + mrqe_val = 0; >> + break; >> + case IXGBE_MRQC_RTRSS8TCEN: >> + mrqe_val = IXGBE_MRQC_RT8TCEN; >> + break; >> + case IXGBE_MRQC_RTRSS4TCEN: >> + mrqe_val = IXGBE_MRQC_RT4TCEN; >> + break; >> + case IXGBE_MRQC_VMDQRSS64EN: >> + /* FIXME. Can 32 pools with rss convert to 64 pools without rss? */ >> + case IXGBE_MRQC_VMDQRSS32EN: > better not change the pool number, can we just print a warning and break? Yes. The implicit changing of the pool number is not a good way. I think just printing a warning and keeping the 'mrqe' field unchanged  may be better. I will do that in the v2 patch. > Otherwise > Acked-by: Qi Zhang > Best regards, Min