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From: "Tan, Jianfeng" <jianfeng.tan@intel.com>
To: "Yang, Zhiyong" <zhiyong.yang@intel.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: "yliu@fridaylinux.org" <yliu@fridaylinux.org>
Subject: Re: [dpdk-dev] [PATCH v3] net/virtio: fix rxq intr config fails using vfio-pci
Date: Thu, 9 Nov 2017 12:40:13 +0800	[thread overview]
Message-ID: <00e59d6d-7bbb-7875-d736-fbb40154e780@intel.com> (raw)
In-Reply-To: <E182254E98A5DA4EB1E657AC7CB9BD2A8B003820@BGSMSX101.gar.corp.intel.com>



On 11/9/2017 12:01 PM, Yang, Zhiyong wrote:

>>>    static int
>>> +virtio_intr_enable(struct rte_eth_dev *dev) {
>>> +	struct virtio_hw *hw = dev->data->dev_private;
>>> +
>>> +	if (rte_intr_enable(dev->intr_handle) < 0)
>>> +		return -1;
>>> +
>>> +	if (!hw->virtio_user_dev)
>>> +		hw->use_msix = vtpci_msix_detect(RTE_ETH_DEV_TO_PCI(dev));
>> Maybe we can check hw->use_msix as an additional check; if it does not equal
>> VIRTIO_MSIX_ENABLE, returns -1.
>>   
>  From my understanding, it is unnecessary.
> Functionality of virtio_intr_enable  should be generic.
> Igb_uio or other can use it. it should be no harm to others.
>   we add msix detect here in order to just get use_msix status.

Fair enough.

>
> Thanks
> Zhiyong

  reply	other threads:[~2017-11-09  4:40 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-31  9:44 [dpdk-dev] [PATCH] net/virtio: fix use_msix get the wrong value Zhiyong Yang
2017-11-01 15:40 ` Yuanhan Liu
2017-11-02  1:46   ` Yang, Zhiyong
2017-11-02  3:36 ` Tan, Jianfeng
2017-11-08 11:03 ` [dpdk-dev] [PATCH v2] net/virtio: fix rxq intr config fails using vfio-pci Zhiyong Yang
2017-11-08 13:52   ` Tan, Jianfeng
2017-11-09  1:28     ` Yang, Zhiyong
2017-11-09  2:11     ` Yang, Zhiyong
2017-11-09  3:31       ` Tan, Jianfeng
2017-11-09  3:18   ` [dpdk-dev] [PATCH v3] " Zhiyong Yang
2017-11-09  3:47     ` Tan, Jianfeng
2017-11-09  4:01       ` Yang, Zhiyong
2017-11-09  4:40         ` Tan, Jianfeng [this message]
2017-11-09  4:46     ` [dpdk-dev] [PATCH v4] " Zhiyong Yang
2017-11-09  6:51       ` Tan, Jianfeng
2017-11-09  8:18       ` Maxime Coquelin
2017-11-09  8:55       ` [dpdk-dev] [PATCH v5] " Zhiyong Yang
2017-11-09  9:08         ` Maxime Coquelin
2017-11-09  9:16           ` Yang, Zhiyong
2017-11-09  9:21         ` [dpdk-dev] [PATCH v6] " Zhiyong Yang
2017-11-11 14:34           ` Thomas Monjalon

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