From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by dpdk.org (Postfix) with ESMTP id E22F85F51; Tue, 10 Jul 2018 13:55:43 +0200 (CEST) Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.rdu2.redhat.com [10.11.54.4]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5BA8D4023132; Tue, 10 Jul 2018 11:55:43 +0000 (UTC) Received: from [10.36.117.44] (ovpn-117-44.ams2.redhat.com [10.36.117.44]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 33EEB2026D6B; Tue, 10 Jul 2018 11:55:42 +0000 (UTC) From: "Eelco Chaudron" To: "Alejandro Lucero" Cc: "Burakov, Anatoly" , dev , stable@dpdk.org, "Maxime Coquelin" , "Ferruh Yigit" Date: Tue, 10 Jul 2018 13:55:40 +0200 Message-ID: <01F82D02-F022-4B51-BBD7-B60943E93846@redhat.com> In-Reply-To: References: <1530708838-2682-1-git-send-email-alejandro.lucero@netronome.com> <1530708838-2682-2-git-send-email-alejandro.lucero@netronome.com> <24D4D56B-BE3A-43DC-AEEE-A063A11C73EC@redhat.com> <33c605a8-cf16-b2f2-ce1d-cdc5d85bb155@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 2.78 on 10.11.54.4 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); Tue, 10 Jul 2018 11:55:43 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); Tue, 10 Jul 2018 11:55:43 +0000 (UTC) for IP:'10.11.54.4' DOMAIN:'int-mx04.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'echaudro@redhat.com' RCPT:'' Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH v3 1/6] mem: add function for checking memsegs IOVAs addresses X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Jul 2018 11:55:44 -0000 On 10 Jul 2018, at 13:43, Alejandro Lucero wrote: > On Tue, Jul 10, 2018 at 12:33 PM, Burakov, Anatoly < > anatoly.burakov@intel.com> wrote: > >> On 10-Jul-18 12:14 PM, Eelco Chaudron wrote: >> >>> >>> >>> On 10 Jul 2018, at 12:52, Alejandro Lucero wrote: >>> >>> On Tue, Jul 10, 2018 at 11:06 AM, Eelco Chaudron >>> >>>> wrote: >>>> >>>> >>>>> >>>>> On 10 Jul 2018, at 11:34, Alejandro Lucero wrote: >>>>> >>>>> On Tue, Jul 10, 2018 at 9:56 AM, Eelco Chaudron >>>>> >>>>> >>>>>> wrote: >>>>>> >>>>>> >>>>>> >>>>>>> On 4 Jul 2018, at 14:53, Alejandro Lucero wrote: >>>>>>> >>>>>>> A device can suffer addressing limitations. This functions >>>>>>> checks >>>>>>> >>>>>>> memsegs have iovas within the supported range based on dma mask. >>>>>>>> >>>>>>>> PMD should use this during initialization if supported devices >>>>>>>> suffer addressing limitations, returning an error if this >>>>>>>> function >>>>>>>> returns memsegs out of range. >>>>>>>> >>>>>>>> Another potential usage is for emulated IOMMU hardware with >>>>>>>> addressing >>>>>>>> limitations. >>>>>>>> >>>>>>>> Signed-off-by: Alejandro Lucero >>>>>>>> >>>>>>>> Acked-by: Anatoly Burakov >>>>>>>> --- >>>>>>>> lib/librte_eal/common/eal_common_memory.c | 33 >>>>>>>> ++++++++++++++++++++++++++++++ >>>>>>>> lib/librte_eal/common/include/rte_memory.h | 3 +++ >>>>>>>> lib/librte_eal/rte_eal_version.map | 1 + >>>>>>>> 3 files changed, 37 insertions(+) >>>>>>>> >>>>>>>> diff --git a/lib/librte_eal/common/eal_common_memory.c >>>>>>>> b/lib/librte_eal/common/eal_common_memory.c >>>>>>>> index fc6c44d..f5efebe 100644 >>>>>>>> --- a/lib/librte_eal/common/eal_common_memory.c >>>>>>>> +++ b/lib/librte_eal/common/eal_common_memory.c >>>>>>>> @@ -109,6 +109,39 @@ >>>>>>>> } >>>>>>>> } >>>>>>>> >>>>>>>> +/* check memseg iovas are within the required range based on >>>>>>>> dma >>>>>>>> mask >>>>>>>> */ >>>>>>>> +int >>>>>>>> +rte_eal_check_dma_mask(uint8_t maskbits) >>>>>>>> +{ >>>>>>>> + >>>>>>>> + const struct rte_mem_config *mcfg; >>>>>>>> + uint64_t mask; >>>>>>>> + int i; >>>>>>>> + >>>>>>>> >>>>>>>> >>>>>>>> I think we should add some sanity check to the input maskbits, >>>>>>>> i.e. >>>>>>> [64,0) >>>>>>> or [64, 32]? What would be a reasonable lower bound. >>>>>>> >>>>>>> >>>>>>> This is not a user's API, so any invocation will be reviewed, >>>>>>> but I >>>>>>> guess >>>>>>> >>>>>> adding a sanity check here does not harm. >>>>>> >>>>>> Not sure about lower bound but upper should 64, although it does >>>>>> not >>>>>> make >>>>>> sense but it is safe. Lower bound is not so problematic. >>>>>> >>>>>> >>>>>> >>>>>> + /* create dma mask */ >>>>>>> >>>>>>> + mask = ~((1ULL << maskbits) - 1); >>>>>>>> + >>>>>>>> + /* get pointer to global configuration */ >>>>>>>> + mcfg = rte_eal_get_configuration()->mem_config; >>>>>>>> + >>>>>>>> + for (i = 0; i < RTE_MAX_MEMSEG; i++) { >>>>>>>> + if (mcfg->memseg[i].addr == NULL) >>>>>>>> + break; >>>>>>>> >>>>>>>> >>>>>>> Looking at some other code, it looks like NULL entries might >>>>>>> exists. >>>>> So >>>>> should a continue; rather than a break; be used here? >>>>> >>>>> >>>>> I do not think so. memsegs are allocated sequentially, so first >>>>> with >>>> addr >>>> as NULL implies no more memsegs. >>>> >>> >>> I was referring to the mem walk functions, rte_memseg_list_walk(). >>> Maybe >>> some having more experience with this area can review/comment. >>> >> >> Pre-18.05, all memsegs are allocated continuously. Memseg lists and >> memseg >> list walk functions are 18.05+. >> >> Alejandro, perhaps it would be worth it to tag your patchset with >> "pre-18.05" to avoid similar confusion in the future? >> >> > Yes, that will help. I'm sending a new version shortly and I'll make > it > clear. Thanks, I’ll review the new version if it’s ready before the end of tomorrow CET, as I will be on PTO.