From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 54D2F1DA4 for ; Thu, 20 Sep 2018 04:18:50 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Sep 2018 19:18:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,396,1531810800"; d="scan'208";a="265078780" Received: from nikhilr-mobl1.amr.corp.intel.com (HELO [10.252.164.168]) ([10.252.164.168]) by fmsmga006.fm.intel.com with ESMTP; 19 Sep 2018 19:18:47 -0700 To: Pavan Nikhilesh , jerin.jacob@caviumnetworks.com, harry.van.haaren@intel.com, anoob.joseph@caviumnetworks.com Cc: dev@dpdk.org, "Rao, Nikhil" References: <20180905134554.25243-1-pbhagavatula@caviumnetworks.com> <2913f7a3-b531-ce60-d6fd-3585e8c85288@intel.com> <20180919104116.GA17244@ltp-pvn> From: "Rao, Nikhil" Message-ID: <01beb974-608a-a059-ab44-304d7651ec1a@intel.com> Date: Thu, 20 Sep 2018 07:48:45 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.0 MIME-Version: 1.0 In-Reply-To: <20180919104116.GA17244@ltp-pvn> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH] examples/eventdev_pipeline: add Tx adapter support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 20 Sep 2018 02:18:52 -0000 On 9/19/2018 4:12 PM, Pavan Nikhilesh wrote: > On Wed, Sep 19, 2018 at 08:24:01AM +0530, Rao, Nikhil wrote: >> On 9/5/2018 7:15 PM, Pavan Nikhilesh wrote: >>> Signed-off-by: Pavan Nikhilesh >>> --- >>> This patch depends on the following series: >>> http://patches.dpdk.org/project/dpdk/list/?series=1121 >>> >>> examples/eventdev_pipeline/main.c | 62 ++-- >>> examples/eventdev_pipeline/pipeline_common.h | 31 +- >>> .../pipeline_worker_generic.c | 273 +++++------------- >>> .../eventdev_pipeline/pipeline_worker_tx.c | 130 +++++---- >>> 4 files changed, 186 insertions(+), 310 deletions(-) >>> >>> diff --git a/examples/eventdev_pipeline/main.c b/examples/eventdev_pipeline/main.c >>> index 700bc696f..95531150b 100644 >>> --- a/examples/eventdev_pipeline/main.c >>> +++ b/examples/eventdev_pipeline/main.c >>> >>> >> >> >>> static void >>> do_capability_setup(uint8_t eventdev_id) >>> { >>> + int ret; >>> uint16_t i; >>> - uint8_t mt_unsafe = 0; >>> + uint8_t generic_pipeline = 0; >>> uint8_t burst = 0; >>> >>> RTE_ETH_FOREACH_DEV(i) { >>> - struct rte_eth_dev_info dev_info; >>> - memset(&dev_info, 0, sizeof(struct rte_eth_dev_info)); >>> - >>> - rte_eth_dev_info_get(i, &dev_info); >>> - /* Check if it is safe ask worker to tx. */ >>> - mt_unsafe |= !(dev_info.tx_offload_capa & >>> - DEV_TX_OFFLOAD_MT_LOCKFREE); >>> + uint32_t caps = 0; >>> + >>> + ret = rte_event_eth_tx_adapter_caps_get(eventdev_id, i, &caps); >>> + if (ret) >>> + rte_exit(EXIT_FAILURE, >>> + "Invalid capability for Tx adptr port %d\n", i); >>> + generic_pipeline |= !(caps & >>> + RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT); >>> } >>> >>> struct rte_event_dev_info eventdev_info; >>> @@ -406,10 +386,10 @@ do_capability_setup(uint8_t eventdev_id) >>> burst = eventdev_info.event_dev_cap & RTE_EVENT_DEV_CAP_BURST_MODE ? 1 : >>> 0; >>> >>> - if (mt_unsafe) >>> + if (generic_pipeline) >>> set_worker_generic_setup_data(&fdata->cap, burst); >>> else >>> - set_worker_tx_setup_data(&fdata->cap, burst); >>> + set_worker_tx_enq_setup_data(&fdata->cap, burst); >>> } >> >> The generic_pipeline flag is set here and therefore, aren't the >> subsequent checks in generic_opt_check() and worker_tx_enq_opt_check() >> redundant ? > > The checks inside generic_opt_check, worker_tx_enq_opt_check are still required > as different eventdevs opdl, DSW, dpaa, sw, octeontx might have different > capabilities. I should have mentioned in the previous reply, the checks was I referring to were the checks for the RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT flag. Also, on second reading, I noticed these checks had RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT not RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT. Thanks, Nikhil