From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by dpdk.org (Postfix) with ESMTP id 5C6452C5E for ; Mon, 9 Apr 2018 12:26:46 +0200 (CEST) Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w39AOKb3014670 for ; Mon, 9 Apr 2018 06:26:45 -0400 Received: from e06smtp15.uk.ibm.com (e06smtp15.uk.ibm.com [195.75.94.111]) by mx0a-001b2d01.pphosted.com with ESMTP id 2h81s6khnp-1 (version=TLSv1.2 cipher=AES256-SHA256 bits=256 verify=NOT) for ; Mon, 09 Apr 2018 06:26:44 -0400 Received: from localhost by e06smtp15.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 9 Apr 2018 11:26:42 +0100 Received: from b06cxnps3075.portsmouth.uk.ibm.com (9.149.109.195) by e06smtp15.uk.ibm.com (192.168.101.145) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Mon, 9 Apr 2018 11:26:36 +0100 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w39AQa1j5177618; Mon, 9 Apr 2018 10:26:36 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 37B4D4203F; Mon, 9 Apr 2018 11:18:21 +0100 (BST) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7C82E42047; Mon, 9 Apr 2018 11:18:17 +0100 (BST) Received: from [9.84.220.4] (unknown [9.84.220.4]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 9 Apr 2018 11:18:17 +0100 (BST) To: Anatoly Burakov , dev@dpdk.org Cc: Adrien Mazarguil , Nelio Laranjeiro , Yongseok Koh , keith.wiles@intel.com, jianfeng.tan@intel.com, andras.kovacs@ericsson.com, laszlo.vadkeri@ericsson.com, benjamin.walker@intel.com, bruce.richardson@intel.com, thomas@monjalon.net, konstantin.ananyev@intel.com, kuralamudhan.ramakrishnan@intel.com, louise.m.daly@intel.com, pepperjo@japf.ch, jerin.jacob@caviumnetworks.com, hemant.agrawal@nxp.com, olivier.matz@6wind.com, shreyansh.jain@nxp.com References: <0541a675ec4a7906e50ddfa8881446c98158666a.1523218215.git.anatoly.burakov@intel.com> From: gowrishankar muthukrishnan Date: Mon, 9 Apr 2018 15:56:31 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <0541a675ec4a7906e50ddfa8881446c98158666a.1523218215.git.anatoly.burakov@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-GB X-TM-AS-GCONF: 00 x-cbid: 18040910-0020-0000-0000-0000040FA54B X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18040910-0021-0000-0000-000042A3C569 Message-Id: <02565d9e-333e-e406-25f8-863aa897d864@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-09_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1804090114 Subject: Re: [dpdk-dev] [PATCH v4 44/70] net/mlx5: use virt2memseg instead of iteration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 09 Apr 2018 10:26:46 -0000 On Monday 09 April 2018 01:48 AM, Anatoly Burakov wrote: > Reduce dependency on internal details of EAL memory subsystem, and > simplify code. > > Signed-off-by: Anatoly Burakov > --- > drivers/net/mlx5/mlx5_mr.c | 18 ++++++++---------- > 1 file changed, 8 insertions(+), 10 deletions(-) > > diff --git a/drivers/net/mlx5/mlx5_mr.c b/drivers/net/mlx5/mlx5_mr.c > index 2bf1f9c..d8c04dc 100644 > --- a/drivers/net/mlx5/mlx5_mr.c > +++ b/drivers/net/mlx5/mlx5_mr.c > @@ -234,7 +234,7 @@ struct mlx5_mr * > mlx5_mr_new(struct rte_eth_dev *dev, struct rte_mempool *mp) > { > struct priv *priv = dev->data->dev_private; > - const struct rte_memseg *ms = rte_eal_get_physmem_layout(); > + const struct rte_memseg *ms; > uintptr_t start; > uintptr_t end; > unsigned int i; Unused variable 'i' to be removed. Thanks, Gowrishankar > @@ -261,17 +261,15 @@ mlx5_mr_new(struct rte_eth_dev *dev, struct rte_mempool *mp) > /* Save original addresses for exact MR lookup. */ > mr->start = start; > mr->end = end; > + > /* Round start and end to page boundary if found in memory segments. */ > - for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) { > - uintptr_t addr = (uintptr_t)ms[i].addr; > - size_t len = ms[i].len; > - unsigned int align = ms[i].hugepage_sz; > + ms = rte_mem_virt2memseg((void *)start); > + if (ms != NULL) > + start = RTE_ALIGN_FLOOR(start, ms->hugepage_sz); > + ms = rte_mem_virt2memseg((void *)end); > + if (ms != NULL) > + end = RTE_ALIGN_CEIL(end, ms->hugepage_sz); > > - if ((start > addr) && (start < addr + len)) > - start = RTE_ALIGN_FLOOR(start, align); > - if ((end > addr) && (end < addr + len)) > - end = RTE_ALIGN_CEIL(end, align); > - } > DRV_LOG(DEBUG, > "port %u mempool %p using start=%p end=%p size=%zu for memory" > " region",