From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 15B0EA09E4; Fri, 29 Jan 2021 15:04:22 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 017C94068B; Fri, 29 Jan 2021 15:04:22 +0100 (CET) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id D93ED4067E for ; Fri, 29 Jan 2021 15:04:19 +0100 (CET) IronPort-SDR: MBfCSqIQuwjGVqQ+rLGhEfEYMhT/aSVs6OaZ474EGSMs0MzzX/qF8ttQBZTsI9SthlkL5czhk7 dn3+BzpA8e1A== X-IronPort-AV: E=McAfee;i="6000,8403,9878"; a="160197270" X-IronPort-AV: E=Sophos;i="5.79,385,1602572400"; d="scan'208";a="160197270" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2021 06:04:05 -0800 IronPort-SDR: utg9SWLr5ekQzQuTYe+T1Yv5DdYrx4RcgCJSdUzgs9TU6xCTicABFSd83ikm9cZDg9+zwLBMzH Zh1C//oakOBQ== X-IronPort-AV: E=Sophos;i="5.79,385,1602572400"; d="scan'208";a="389313795" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.197.204]) ([10.213.197.204]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2021 06:04:03 -0800 To: Nalla Pradeep , Radha Mohan Chintakuntla , Veerasenareddy Burru , Anatoly Burakov Cc: jerinj@marvell.com, sburla@marvell.com, dev@dpdk.org References: <20210129001640.1251-1-pnalla@marvell.com> <20210129124510.12158-8-pnalla@marvell.com> From: Ferruh Yigit Message-ID: <02e1fde1-980b-ac1c-07da-08a4f9d3fa41@intel.com> Date: Fri, 29 Jan 2021 14:04:00 +0000 MIME-Version: 1.0 In-Reply-To: <20210129124510.12158-8-pnalla@marvell.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v7 07/12] net/octeontx_ep: added rxq setup and release X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 1/29/2021 12:45 PM, Nalla Pradeep wrote: > Receive queue setup involves allocating memory for the queue, > initializing data structure representing the queue and filling queue > with receive buffers of rx descriptor count. Receive queues are referred > as droq. Hardware fills the receive buffers in queue with the packet. > > In receive queue release, receive buffers are freed along with the > receive queue. > > Signed-off-by: Nalla Pradeep <...> > + > + otx_ep_dbg("OQ[%d]: desc_ring: virt: 0x%p, dma: %lx\n", > + q_no, droq->desc_ring, (unsigned long)droq->desc_ring_dma); 'desc_ring_dma' type is 'size_t', and the format specifier for it is '%zx', using correct specifier removes the need to cast.