From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 0474B2BBD for ; Mon, 26 Sep 2016 02:52:18 +0200 (CEST) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP; 25 Sep 2016 17:52:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,396,1470726000"; d="scan'208";a="13140163" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga005.fm.intel.com with ESMTP; 25 Sep 2016 17:52:18 -0700 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.248.2; Sun, 25 Sep 2016 17:52:18 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.248.2; Sun, 25 Sep 2016 17:52:17 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.234]) by shsmsx102.ccr.corp.intel.com ([169.254.2.15]) with mapi id 14.03.0248.002; Mon, 26 Sep 2016 08:52:13 +0800 From: "Zhang, Qi Z" To: "Wu, Jingjing" , "Zhang, Helin" CC: "dev@dpdk.org" Thread-Topic: [PATCH v3 1/2] net/i40e: use PHY type to check PHY capability Thread-Index: AQHSFTSinyfCsK8ALk6mtw5EUOZPs6CJdk2AgAF8SFA= Date: Mon, 26 Sep 2016 00:52:13 +0000 Message-ID: <039ED4275CED7440929022BC67E706115064DEE6@SHSMSX103.ccr.corp.intel.com> References: <1474566582-41089-1-git-send-email-qi.z.zhang@intel.com> <1474566582-41089-2-git-send-email-qi.z.zhang@intel.com> <9BB6961774997848B5B42BEC655768F80E272427@SHSMSX103.ccr.corp.intel.com> In-Reply-To: <9BB6961774997848B5B42BEC655768F80E272427@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZWVhZmY2YjctZGNmNi00N2Y0LTllZTEtYWJhZjVjMzFiYjMxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IjhvOTRtTHE0d3RXZjlISTlZY3ZpN3BJY3JCSmdURTFFb2pNZXdRY0JZNTA9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 1/2] net/i40e: use PHY type to check PHY capability X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Sep 2016 00:52:19 -0000 Hi=20 > -----Original Message----- > From: Wu, Jingjing > Sent: Sunday, September 25, 2016 5:59 PM > To: Zhang, Qi Z ; Zhang, Helin > Cc: dev@dpdk.org > Subject: RE: [PATCH v3 1/2] net/i40e: use PHY type to check PHY capabilit= y >=20 >=20 >=20 > > -----Original Message----- > > From: Zhang, Qi Z > > Sent: Friday, September 23, 2016 1:50 AM > > To: Wu, Jingjing ; Zhang, Helin > > > > Cc: dev@dpdk.org; Zhang, Qi Z > > Subject: [PATCH v3 1/2] net/i40e: use PHY type to check PHY capability > > > > In previous code, we use device ID to check PHY capability which is > > not extensible since there is always new device be added. > > Now we use PHY type to detect PHY capability. > > PHY type encoded all link speed the device support, it is read out > > through aq command "get_phy_capability" > > at init stage. > > > > Signed-off-by: Zhang Qi > > --- > > drivers/net/i40e/i40e_ethdev.c | 33 ++++++++++++++++++++++++++++----- > > drivers/net/i40e/i40e_ethdev.h | 8 ++++++++ > > 2 files changed, 36 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/net/i40e/i40e_ethdev.c > > b/drivers/net/i40e/i40e_ethdev.c index acc25a2..9658503 100644 > > --- a/drivers/net/i40e/i40e_ethdev.c > > +++ b/drivers/net/i40e/i40e_ethdev.c > > @@ -411,6 +411,7 @@ static int i40e_dev_filter_ctrl(struct rte_eth_dev > *dev, > > void *arg); > > static int i40e_dev_get_dcb_info(struct rte_eth_dev *dev, > > struct rte_eth_dcb_info *dcb_info); > > +static int i40e_dev_sync_phy_type(struct i40e_hw *hw); > > static void i40e_configure_registers(struct i40e_hw *hw); static > > void i40e_hw_init(struct rte_eth_dev *dev); static int > > i40e_config_qinq(struct i40e_hw *hw, struct i40e_vsi *vsi); @@ -1028,7 > > +1029,11 @@ eth_i40e_dev_init(struct rte_eth_dev *dev) > > config_floating_veb(dev); > > /* Clear PXE mode */ > > i40e_clear_pxe_mode(hw); > > - > > + ret =3D i40e_dev_sync_phy_type(hw); > > + if (ret !=3D I40E_SUCCESS) { > > + PMD_INIT_LOG(ERR, "Failed to init phy type: %d", ret); > > + goto err_sync_phy_type; > > + } > Should we return from device initialization if failure? Admin queue is already initialized before this, get_phy_capability should not fail, so initialization should stop if an unexpected failure happen. > And return value of i40e_dev_sync_phy_type is standard error, but you che= ck It > by comparing with I40E defined error code. I will correct it, thanks for capture this. >=20 > Thanks > Jingjing Thanks Qi