From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 8534A6932 for ; Tue, 14 Feb 2017 01:13:57 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Feb 2017 16:13:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,158,1484035200"; d="scan'208";a="43972857" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga002.jf.intel.com with ESMTP; 13 Feb 2017 16:13:56 -0800 Received: from fmsmsx118.amr.corp.intel.com (10.18.116.18) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 13 Feb 2017 16:13:56 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx118.amr.corp.intel.com (10.18.116.18) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 13 Feb 2017 16:13:55 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.20]) by SHSMSX104.ccr.corp.intel.com ([10.239.4.70]) with mapi id 14.03.0248.002; Tue, 14 Feb 2017 08:13:54 +0800 From: "Zhang, Qi Z" To: Thomas Monjalon CC: "dev@dpdk.org" , "Wu, Jingjing" Thread-Topic: [PATCH] eal: fix max number of interrupt request Thread-Index: AQHSg0phfubNmb4Lkkm+E4CCzxKBc6FhgWuAgASdGpCAANUhAIAAs5vg Date: Tue, 14 Feb 2017 00:13:53 +0000 Message-ID: <039ED4275CED7440929022BC67E706115305B613@SHSMSX103.ccr.corp.intel.com> References: <1486670383-5286-1-git-send-email-qi.z.zhang@intel.com> <3158466.ioj3dkTVO6@xps13> <039ED4275CED7440929022BC67E706115305B067@SHSMSX103.ccr.corp.intel.com> <11810388.91RJejsIF6@xps13> In-Reply-To: <11810388.91RJejsIF6@xps13> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMjAwMzQ4MDAtMTc3NC00ZTJhLThjNTUtMjJmMjQ2MWE3ZWU2IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IkNZcW52VU1yemhYK3NHYUlkSXN0Rk4wT29sbVduOWRPMWh2SHhsUDMxd3M9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] eal: fix max number of interrupt request X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 14 Feb 2017 00:13:58 -0000 > -----Original Message----- > From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com] > Sent: Tuesday, February 14, 2017 5:29 AM > To: Zhang, Qi Z > Cc: dev@dpdk.org; Wu, Jingjing > Subject: Re: [PATCH] eal: fix max number of interrupt request >=20 > 2017-02-13 01:16, Zhang, Qi Z: > > Hi Thomas: > > > > From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com] > > > 2017-02-09 14:59, Qi Zhang: > > > > The max number of interrupt request is possible be changed after > > > > rte_intr_callback_register, so in get_max_intr, we need to check > > > > if nessesary to update the max_intr. > > > > > > So you are using rte_intr_enable() to update the max_intr field in > > > the case of VFIO_MSIX. > > > What about MSI, INTX and UIO cases? > > > > My thought is, even without my fix, VFIO_MSIX is already the only case > > that try to modify max_intr field In get_max_intr, we have: > > if (!src->intr_handle.max_intr) > > src->intr_handle.max_intr =3D 1; > > else if (src->intr_handle.max_intr > > RTE_MAX_RXTX_INTR_VEC_ID) > > src->intr_handle.max_intr > > =3D RTE_MAX_RXTX_INTR_VEC_ID + > 1; So my > > patch just follow this and fix some problem. > > > > Another option is I can use a local variable that assigned by max_intr = with > boundary check, so get_max_intr can be totally removed and max_intr in > intr_source will not be modified. > > > > To me both fix are not perfect, I think the problem is in > rte_intr_callback_register we just save a copy of the pci_dev->intr_handl= e > but not the address point, so we are missing some mechanism to sync them. > > But since we have tight schedule on the 17.02 release and this issue do= es > cause some example code can't work, so we need to a fix it first, we may > consider improve the mechanism later. > > > > Thanks > > Qi >=20 > Applied with this title: "vfio: fix maximum number of interrupt for MSI-X= " >=20 > Please check how to document this behaviour and make it consistent with > other types of interrupts. OK, I will check. Thanks Qi